參數(shù)資料
型號(hào)： GS8161Z18DT-200T
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 1M X 18 ZBT SRAM, 6.5 ns, PQFP100
封裝： ROHS COMPLIANT, TQFP-100
文件頁(yè)數(shù)： 33/38頁(yè)
文件大?。?/td> 283K
代理商： GS8161Z18DT-200T
GS8161Z18D(GT/D)/GS8161Z32D(D)/GS8161Z36D(GT/D)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00 6/2011
4/38
2011, GSI Technology
Preliminary
100-Pin TQFP Pin Descriptions
Symbol
Type
Description
A0, A1
In
Burst Address Inputs; Preload the burst counter
A
In
Address Inputs
CK
In
Clock Input Signal
BA
In
Byte Write signal for data inputs DQA1–DQA9; active low
BB
In
Byte Write signal for data inputs DQB1–DQB9; active low
BC
In
Byte Write signal for data inputs DQC1–DQC9; active low
BD
In
Byte Write signal for data inputs DQD1–DQD9; active low
W
In
Write Enable; active low
E1
In
Chip Enable; active low
E2
In
Chip Enable—Active High. For self decoded depth expansion
E3
In
Chip Enable—Active Low. For self decoded depth expansion
G
In
Output Enable; active low
ADV
In
Advance/Load; Burst address counter control pin
CKE
In
Clock Input Buffer Enable; active low
NC
—
No Connect
DQA, DQPA
I/O
Byte A Data Input and Output pins
DQB, DQPB
I/O
Byte B Data Input and Output pins
DQC, DQPC
I/O
Byte C Data Input and Output pins
DQD, DQPD
I/O
Byte D Data Input and Output pins
ZZ
In
Power down control; active high
FT
In
Pipeline/Flow Through Mode Control; active low
LBO
In
Linear Burst Order; active low.
MCH
—
Must Connect High (165 BGA only)
TMS
Scan Test Mode Select
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GS8161Z18T-133 制造商:未知廠家 制造商全稱:未知廠家 功能描述:18Mb Pipelined and Flow Through Synchronous NBT SRAM
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GS8161Z18T-133T 制造商:GSI 制造商全稱:GSI Technology 功能描述:18Mb Pipelined and Flow Through Synchronous NBT SRAM
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