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參數(shù)資料
| 型號： | GD16367B-52BA |
| 英文描述： | ATM Multiplexer |
| 中文描述： | ATM多路復(fù)用器 |
| 文件頁數(shù)： | 5/14頁 |
| 文件大小： | 122K |
| 代理商： | GD16367B-52BA |
Functional Details, The Receiver - GD16368B
The GD16368B is the receiver (see
Figure 4
) with:
u
Clock&Data Recovery (CDR)
u
Selectable CMI-Decoding
u
Demultiplexer (1:2/4/8)
u
Selectable System Loop Back data
differential input
u
Selectable Line Loop Back / 1:1 CDR
data and clock outputs
Inputs
The serial input is selected by SLB. For
normal operation, SIP/SIN is selected
when SLB is low. For system loop back
operation, SLSIP/SLSIN is selected
when SLB is high.
The selected serial input data is the input
of the CDR, where the clock and data is
recovered.
The PLL constantly attempts to lock to
the incoming data stream. In case the in-
coming data signal is lost, the VCO will
drift away from the CKRF reference fre-
quency. The VCO is monitored by a
built-in lock detector. When it drifts more
than 500 ppm (or 2000 ppm, selectable)
away from the reference frequency, it is
“kicked back” to the reference frequency
and starts hunting for incoming data
again.
CKRF does not have any part in the jitter
performance (as long as the incoming
data frequency is within 500 ppm of the
required 70/78 MHz).
Figure 4.
Block Diagram - GD16368B
CMI-Decoder
When the CMI-decoding is enabled
(SEL1=0), 280/311 Mbit/s is decoded as
2-bits CMI-words into 1-bit NRZ 140/
155 Mbit/s. The internal 140/155 MHz
clock is aligned to the CMI-words. See
Table 2 on
page 3
for the CMI-coding.
When the CMI-decoding is disabled
(SEL1=1), the 140/155 Mbit/s data signal
is passed unchanged through the CMI-
decoder.
Outputs
The 140/155 Mbit/s recovered (and de-
coded) data is de-multiplexed into 2, 4, or
8 parallel data bits (DOU0...DOU7) se-
lected by PW1 and PW2 (see Table 1 on
page 2
).
DOCK is the output clock synchronous to
the parallel data (See AC Characteristics
on
page 11
).
The phase can be adjusted with SEL2
and SEL3 (0°/90°/180°/270°, see pin list).
If the incoming data stream is lost, DOCK
will be floating within a +/-500(2000) ppm
window around the CKRF frequency (di-
vided by 1, 2, or 4 depending of the par-
allel bit rate). In CMI-mode, the CODV
output will be signalling errors if the sig-
nal is lost.
Data Sheet Rev. 14
GD16367B/GD16368B
Page 5 of 14
1 F
20
C
L
L
L
L
C
V
S
S
S
P
P
DOU0
SIP
SIN
SELTCK
TCK
SLSIP
SLSIN
SLB
LLB
LDS1
LDS2
DOU7
CDR
CMI
Decoder
De-
MUX
DOCK
CODV
VEE
VDD
VDDA
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PDF描述 |
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| GD16523-100BA | PCM， Other/Special/Miscellaneous |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GD16368B-52BA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATM/SONET Demultiplexer |
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| GD16521-48BA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.5 GBIT/S RE TIMING LASER DRIVER |
| GD16521-D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.5 GBIT/S RE TIMING LASER DRIVER |
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