參數(shù)資料
型號(hào)： FX579
英文描述： Half Duplex GMSK Modem
中文描述： 半雙工GMSK調(diào)制解調(diào)器
文件頁(yè)數(shù)： 11/23頁(yè)
文件大?。?/td> 582K
代理商： FX579
Half Duplex GMSK Modem
FX579
1996 Consumer Microcircuits Limited
11
D/579/4
Receive Signal Path
The function of the Rx circuitry is to:
a)
Accept an incoming signal from the radio's frequency discriminator at a defined level via
suitable external signal and dc level adjustment
Clean the signal by filtering
Provide dc level thresholds for clock and data extraction
Provide clock timing information for data extraction and external circuits
Provide Rx data as an output in binary form
b)
c)
d)
e)
The output of the radio receiver's frequency discriminator after suitable external signal and level
adjustment is applied to the RXIN pin. With V
DD
= 5V, nominal input level when receiving a continuous
"1111000011110000..." data pattern should be 1V pk-pk (level is proportional to V
DD
) centred around
V
DD
. Positive going signal excursions about V
BIAS
at RXIN will produce a logic "1" on the DATAIO
pin, negative going signal excursions will produce a logic "0".
The signal is then applied to the low pass Rx filter, which has a -3dB corner frequency of 0.56 times the
data bit rate, before being applied to the Level Measuring and Clock and Data Extraction blocks.
Level Measuring Circuit
The 'Level Measuring' block consists of two voltage detectors one of which measures the amplitude of
the 'positive' peaks of the received signal, while the other measures the 'negative' peaks. These
detectors use the external capacitors connected to the DOC1 and DOC2 pins to form voltage hold or
integrator circuits.
Results of the two measurements are then processed within the modem to establish the optimum dc
level decision thresholds for the Clock and Data Extraction circuits, depending on the received signal
amplitude, BT and any dc offset present.
The receive circuits operate in several control modes as defined by the logic level applied to the
acquire pin. These are explained later - See 'Acquire Sequence'.
Rx Clock Extraction Block
The 'Rx Clock Extraction' circuit is based on a zero crossing tracking loop which uses a multi resolution
digital phase locked loop (PLL). The wide bandwidth mode allows for fast initial phase acquisition.
Eight good zero crossings are required for correct operation.
The highest timing resolution is obtained when the PLL is in its narrow bandwidth mode. This mode of
operation yields the least amount of phase jitter, which is responsible for the associated bit error rate
(BER) performance degradation.
The PLL operating mode is defined by the logic level applied to the ACQUIRE pin - See 'Acquire
Sequence'.
Rx Data Extraction Block
The 'Rx Data Extraction' circuit decides whether each received bit is a "1" or "0" by sampling the
received signal, after filtering, in the middle of each bit period and comparing the sampled voltage
against a threshold derived from the 'Level Measuring' circuit. This threshold is adapted from bit to bit
to compensate for intersymbol interference depending on the chosen BT. The extracted data is output
from the DATAIO pin and should be sampled externally on the rising edge of the received data clock.
相關(guān)PDF資料
PDF描述
FX601A Monostable Multivibrator
FX601R Analog IC
FX601 Ultrahigh-Speed Switching Applications
FX6A-20S-0.8SV 0.8mm Pitch Stacking Height 5 to 9mm Connector
FX6-100S-0.8SV 0.8mm Pitch Stacking Height 5 to 9mm Connector
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
FX579D4 制造商:CMLMICRO 制造商全稱:CML Microcircuits 功能描述:HALF DUPLEX GMSK MODEM
FX5800-TD 制造商:Micro-Star International 功能描述:GF FX 5800 128MB 8X AGP - Bulk
FX5-80P-SH 功能描述:CONN HEADER 80POS 1MM R/A GOLD RoHS:否 類別:連接器，互連式 >> 板對(duì)板 - 陣列，邊緣類型，包廂 系列:FX5 標(biāo)準(zhǔn)包裝:3,000 系列:SlimStack™ 502396 連接器類型:插頭，外罩觸點(diǎn) 位置數(shù):100 間距:0.016"（0.40mm） 行數(shù):2 安裝類型:表面貼裝 特點(diǎn):固定焊尾 觸點(diǎn)表面涂層:金 觸點(diǎn)涂層厚度:8µin（0.20µm） 包裝:帶卷 (TR) 配接層疊高度:2.5mm 板上方高度:0.084"（2.13mm） 其它名稱:502396-1010
FX5-80P-SH(71) 功能描述:板對(duì)板與夾層連接器 HDR 80P 1MM R/A GOLD RoHS:否 制造商:JAE Electronics 系列:WP3 產(chǎn)品類型:Receptacles 節(jié)距:0.4 mm 疊放高度:1 mm 安裝角: 位置/觸點(diǎn)數(shù)量:50 排數(shù):2 外殼材料:Plastic 觸點(diǎn)材料:Copper Alloy 觸點(diǎn)電鍍:Gold 電壓額定值:50 V 電流額定值:0.4 A
FX5-80P-SH(72) 功能描述:板對(duì)板與夾層連接器 80P R/A SMT HEADER LOC BOSS GLD PLT RoHS:否 制造商:JAE Electronics 系列:WP3 產(chǎn)品類型:Receptacles 節(jié)距:0.4 mm 疊放高度:1 mm 安裝角: 位置/觸點(diǎn)數(shù)量:50 排數(shù):2 外殼材料:Plastic 觸點(diǎn)材料:Copper Alloy 觸點(diǎn)電鍍:Gold 電壓額定值:50 V 電流額定值:0.4 A
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*