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參數(shù)資料
型號: FT2232D-REEL
廠商: FTDI, Future Technology Devices International Ltd
文件頁數(shù): 38/61頁
文件大?。?/td> 0K
描述: IC USB FS DUAL UART/FIFO 48-LQFP
產(chǎn)品培訓模塊: USB Introduction
標準包裝: 1
系列: USBmadeEZ-FIFO,F(xiàn)T-X,X-Chip
特點: USB 至 UART 和(或)FIFO、SPI、I2C、JTAG
通道數(shù): 2,DUART
FIFO's: 384 字節(jié)
規(guī)程: RS232,RS422,RS485
電源電壓: 4.35 V ~ 5.25 V
帶并行端口:
帶自動流量控制功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP
包裝: 標準包裝
產(chǎn)品目錄頁面: 634 (CN2011-ZH PDF)
配用: 768-1030-ND - MOD USB HS FT2232H EVAL
813-1009-ND - MODULE USB-TO-FPGA TOOL W/MANUAL
813-1001-ND - MODULE USB ADAPTR FOR FT2232D LP
813-1000-ND - MODULE USB ADAPTER FOR FT2232D
其它名稱: 768-1010-6
Copyright 2010 Future Technology Devices International Limited
43
Document No.: FT_000173
FT2232D DUAL USB TO SERIAL UART
/FIFO IC Datasheet
Version 2.05
Clearance No.: FTDI# 127
When Channel A is configured in MPSSE mode the IO signal lines are configured as follows:-
Pin#
Signal
Type
Description
Channel A only
24
TCK/SK
OUTPUT
Clock signal Output
23
TDI/D0
OUTPUT
Serial Data Out
22
TDO/DI
INPUT
Serial Data In **Note 27
21
TMS/CS
OUTPUT
Select Signal Out
20
GPIOL0
I/O
General Purpose input / Output **Note 27
19
GPIOL1
I/O
General Purpose input / Output **Note 27
17
GPIOL2
I/O
General Purpose input / Output **Note 27
16
GPIOL3
I/O
General Purpose input / Output **Note 27
15
GPIOH0
I/O
General Purpose input / Output **Note 27
13
GPIOH1
I/O
General Purpose input / Output **Note 27
12
GPIOH2
I/O
General Purpose input / Output **Note 27
11
GPIOH3
I/O
General Purpose input / Output **Note 27
Table 8.9 MPSSE Mode Configuration
**Note 27: In Input Mode, these pins are pulled to VCCIO via internal 200K resistors. These can be
programmed to gently pull low during USB suspend ( PWREN# = “1” ) by setting this option in the
EEPROM.
Enabling
MPSSE mode is enabled using Set Bit Bang Mode driver command. A hex value of 2 will enable it, and a
hex value of 0 will reset the device. See application note AN2232-02, “Bit Mode Functions for the
FT2232D” for more details and examples.
The MPSSE command set is fully described in application note AN_108, “Command Processor for
MPSSE and MCU Host Bus Emulation Modes”.
Example project code for the FT2232D that demonstrates how to use the devices Multi-Protocol
Synchronous Serial Engine (MPSSE) to make a USB to SPI bus interface are available from FTDIs web
Example project code for the FT2232D that demonstrates how to use the devices Multi-Protocol
Synchronous Serial Engine (MPSSE) to make a USB to I2C bus interface are available from FTDIs web
Example project code for the FT2232D that demonstrates how to use the devices Multi-Protocol
Synchronous Serial Engine (MPSSE) to make a USB to JTAG bus interface are available from FTDIs web
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