TA = 25°C, unless othe" />
參數(shù)資料
型號(hào): EVAL-CN0204-SDPZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 32/32頁(yè)
文件大?。?/td> 0K
描述: BOARD CFTL AD5662 AD5751
設(shè)計(jì)資源: CN-0204 CFTL Eval/Design Support
標(biāo)準(zhǔn)包裝: 1
系列: Circuits from the Lab™
主要目的: 參考設(shè)計(jì),模擬輸出模塊
嵌入式:
已用 IC / 零件: AD5662,AD5751,ADuM1301,ADuM5401
主要屬性: 隔離
已供物品:
Data Sheet
AD5751
Rev. B | Page 9 of 32
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. Transient currents of up to
100 mA do not cause SCR latch-up.
Table 4.
Parameter
Rating
AVDD to GND
0.3 V to +58 V
DVCC to GND
0.3 V to +7 V
Digital Inputs to GND
0.3 V to DVCC + 0.3 V, or 7 V
(whichever is less)
Digital Outputs to GND
0.3 V to DVCC + 0.3 V, or 7 V
(whichever is less)
VREF to GND
0.3 V to +7 V
VSENSE+ to GND
0.3 V to AVDD
VIN to GND
0.3 V to +7 V
VOUT, IOUT to GND
0.3 V to AVDD
Operating Temperature Range
Industrial
40°C to +105°C
Storage Temperature Range
65°C to +150°C
Junction Temperature (TJ max)
125°C
32-Lead LFCSP Package
θJA Thermal Impedance1
42°C/W
Lead Temperature
JEDEC industry standard
Soldering
J-STD-020
1
Simulated data based on a JEDEC 2s2p test board with thermal vias.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
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