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參數(shù)資料
| 型號： | EVAL-CN0204-SDPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD CFTL AD5662 AD5751 |
| 設計資源： | CN-0204 CFTL Eval/Design Support |
| 標準包裝： | 1 |
| 系列： | Circuits from the Lab™ |
| 主要目的： | 參考設計，模擬輸出模塊 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD5662，AD5751，ADuM1301，ADuM5401 |
| 主要屬性： | 隔離 |
| 已供物品： | 板 |
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AD5751
Data Sheet
Rev. B | Page 30 of 32
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The PCB on which the AD5751 is
mounted should be designed so that the AD5751 lies on the
analog plane.
The AD5751 should have ample supply bypassing of 10 μF in
parallel with 0.1 μF on each supply, located as close to the
package as possible, ideally right up against the device. The
10 μF capacitors are the tantalum bead type. The 0.1 μF capaci-
tor should have low effective series resistance (ESR) and low
effective series inductance (ESI) such as the common ceramic
types, which provide a low impedance path to ground at high
frequencies to handle transient currents due to internal logic
switching.
In systems where there are many devices on one board, it is often
useful to provide some heat sinking capability to allow the power
to dissipate easily.
AD5751
GND
PLANE
BOARD
07
269
-01
2
Figure 56. Paddle Connection to Board
The AD5751 has an exposed paddle beneath the device.
Connect this paddle to the GND of the AD5751. For optimum
performance, special considerations should be used to design
the motherboard and to mount the package. For enhanced
thermal, electrical, and board level performance, the exposed
paddle on the bottom of the package should be soldered to the
corresponding thermal land paddle on the PCB (GND).
Thermal vias should be designed into the PCB land paddle area
to further improve heat dissipation.
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. The
iCoupler family of products from Analog Devices, Inc., provides
voltage isolation in excess of 5.0 kV. The serial loading structure
of the AD5751 makes it ideal for isolated interfaces because the
number of interface lines is kept to a minimum. Figure 57 shows a
4-channel isolated interface to the AD5751 using an ADuM1400.
For further information, visit http://www.analog.com/icouplers.
VIA
VOA
TO
SCLK
VIB
VOB
TO
SDIN
VIC
VOC
TO
SYNC
VID
VOD
TO
CLEAR
1ADDITIONAL PINS OMITTED FOR CLARITY.
ENCODE
DECODE
ENCODE
DECODE
ENCODE
DECODE
ENCODE
DECODE
072
69-
013
ADuM14001
SERIAL
CLOCK OUT
SERIAL
DATA OUT
SYNC OUT
CONTROL OUT
CONTROLLER
Figure 57. Isolated Interface
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5751 is via a serial bus that
uses a protocol compatible with microcontrollers and DSP proces-
sors. The communication channel is a 3-wire (minimum)
interface consisting of a clock signal, a data signal, and a SYNC
signal. The AD5751 requires a 16-bit data-word with data valid
on the falling edge of SCLK.
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