參數(shù)資料
型號(hào)： EVAL-CN0204-SDPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 20/32頁(yè)
文件大?。?/td> 0K
描述： BOARD CFTL AD5662 AD5751
設(shè)計(jì)資源： CN-0204 CFTL Eval/Design Support
標(biāo)準(zhǔn)包裝： 1
系列： Circuits from the Lab™
主要目的： 參考設(shè)計(jì)，模擬輸出模塊
嵌入式： 否
已用 IC / 零件： AD5662，AD5751，ADuM1301，ADuM5401
主要屬性： 隔離
已供物品： 板
Data Sheet
AD5751
Rev. B | Page 27 of 32
DETAILED DESCRIPTION OF FEATURES
OUTPUT FAULT ALERT—SOFTWARE MODE
In software mode, the AD5751 is equipped with one FAULT
pin; this is an open-drain output allowing several AD5751
devices to be connected together to one pull-up resistor for
global fault detection. In software mode, the FAULT pin is
forced active low by any one of the following fault scenarios:
The voltage at IOUT attempts to rise above the compliance
range due to an open-loop circuit or insufficient power
supply voltage. The internal circuitry that develops the
fault output avoids using a comparator with window limits
because this requires an actual output error before the fault
output becomes active. Instead, the signal is generated
when the internal amplifier in the output stage has less
than approximately 1 V of remaining drive capability.
Thus, the fault output activates slightly before the com-
pliance limit is reached. Because the comparison is made
within the feedback loop of the output amplifier, the output
accuracy is maintained by its open-loop gain, and an
output error does not occur before the fault output
becomes active.
A short is detected on the voltage output pin (VOUT). The
short-circuit current is limited to 15 mA.
An interface error is detected due to the packet error
checking failure (PEC). See the Packet Error Checking
section.
The core temperature of the AD5751 exceeds
approximately 150°C.
OUTPUT FAULT ALERT—HARDWARE MODE
In hardware mode, the AD5751 is equipped with three fault pins:
VFAULT, IFAULT, and TEMP. These are open-drain outputs
allowing several AD5751 devices to be connected together to
one pull-up resistor for global fault detection. In hardware
control mode, these fault pins are forced active by any one of
the following fault scenarios:
An open-circuit is detected. The voltage at IOUT attempts
to rise above the compliance range, due to an open-loop
circuit or insufficient power supply voltage. The internal
circuitry that develops the fault output avoids using a
comparator with window limits because this requires an
actual output error before the fault output becomes active.
Instead, the signal is generated when the internal amplifier
in the output stage has less than approximately 1 V of
remaining drive capability. Thus, the fault output activates
slightly before the compliance limit is reached. Because the
comparison is made within the feedback loop of the output
amplifier, the output accuracy is maintained by its open-
loop gain, and an output error does not occur before the
fault output becomes active. If this fault is detected, the
IFAULT pin is forced low.
A short is detected on the voltage output pin. The short-
circuit current is limited to 15 mA. If this fault is detected,
the VFAULT pin is forced low.
The core temperature of the AD5751 exceeds approx-
imately 150°C. If this fault is detected, the TEMP pin is
forced low.
VOLTAGE OUTPUT SHORT-CIRCUIT PROTECTION
Under normal operation the voltage output sinks and sources
up to 12 mA and maintains specified operation. The maximum
current that the voltage output delivers is 15 mA; this is the
short-circuit current.
ASYNCHRONOUS CLEAR (CLEAR)
CLEAR is an active high clear that allows the voltage output to
be cleared to either zero-scale code or midscale code, and is
user-selectable via the CLRSEL pin or the CLRSEL bit of the
input shift register, as described in Table 8. (The clear select
feature is a logical OR function of the CLRSEL pin and the
CLRSEL bit). The current loop output clears to the bottom of its
programmed range. When the CLEAR signal is returned low,
the output returns to its programmed value or to a new
programmed value. A clear operation can also be performed via
the clear command in the control register.
Table 11. CLRSEL Options
Output Clear Value
CLRSEL
Unipolar Output
Voltage Range
Unipolar Current Output Range
0
0 V
Zero-scale; for example:
4 mA on the 4 mA to 20 mA range
0 mA on the 0 mA to 20 mA
1
Midscale
Midscale; for example:
12 mA on the 4 mA to 20 mA range
10 mA on the 0 mA to 20 mA range
EXTERNAL CURRENT SETTING RESISTOR
Referring to Figure 1, RSET is an internal sense resistor and is
part of the voltage-to-current conversion circuitry. The nominal
value of the internal current sense resistor is 15 k. To allow for
overrange capability in current mode, the user can also select
the internal current sense resistor to be 14.7 k, giving a nominal
2% overrange capability. This feature is available in the 0 mA to
20 mA, 0 mA to 24 mA, and 4 mA to 20 mA current ranges.
The stability of the output current value over temperature is
dependent on the stability of the value of RSET. As a method of
improving the stability of the output current over temperature,
an external low drift resistor can be connected to the REXT1
and REXT2 pins of the AD5751, which can be used instead of
the internal resistor. The external resistor is selected via the
input shift register. If the external resistor option is not used, the
REXT1 and REXT2 pins should be left floating.
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