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參數(shù)資料
型號(hào): EVAL-ADUC831QSZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 61/76頁(yè)
文件大小: 0K
描述: KIT DEV FOR ADUC831 QUICK START
產(chǎn)品培訓(xùn)模塊: Process Control
標(biāo)準(zhǔn)包裝: 1
系列: QuickStart™ 套件
類型: MCU
適用于相關(guān)產(chǎn)品: ADuC831
所含物品: 評(píng)估板、電源、纜線、軟件和說(shuō)明文檔
產(chǎn)品目錄頁(yè)面: 739 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: ADUC831BCPZ-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP
ADUC831BCPZ-REEL-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP
ADUC831BSZ-REEL-ND - IC MCU 62K FLASH ADC/DAC 52MQFP
ADUC831BSZ-ND - IC ADC/DAC 12BIT W/MCU 52-MQFP
其它名稱: EVAL-ADUC831QS
EVAL-ADUC831QS-ND
REV. 0
–64–
ADuC831
C1+
V+
C1–
C2+
C2–
V–
T2OUT
R2IN
VCC
GND
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
ADM202
1
2
3
4
5
6
7
8
9
DVDD
9-PIN D-SUB
FEMALE
DVDD
27
34
33
31
30
29
28
39
38
37
36
35
32
40
47
46
44
43
42
41
52
51
50
49
48
45
DVDD
1k
DVDD
1k
2-PIN HEADER FOR
EMULATION ACCESS
(NORMALLY OPEN)
DOWNLOAD/DEBUG
ENABLE JUMPER
(NORMALLY OPEN)
11.0592MHz
DVDD
AVDD
AGND
CREF
VREF
DAC0
DAC1
DV
DD
DGND
PSEN
EA
DGND
DVDD
XTAL2
XTAL1
RESET
RXD
TXD
DV
DD
DGND
NOT CONNECTED IN THIS EXAMPLE
ADuC831
ADC0
ADC7
ANALOG INPUT
VREF OUTPUT
DAC OUTPUT
Figure 64. Example ADuC831 System (PQFP Package)
Note that
PSEN is normally an output (as described in the External
Memory Interface section) and is sampled as an input only on the
falling edge of RESET (i.e., at power-up or upon an external
manual reset). Note also that if any external circuitry uninten-
tionally pulls
PSEN low during power-up or reset events, it could
cause the chip to enter download mode and therefore fail to begin
user code execution as it should. To prevent this, ensure that no
external signals are capable of pulling the
PSEN pin low, except
for the external
PSEN jumper itself.
Embedded Serial Port Debugger
From a hardware perspective, entry into serial port debug mode
is identical to the serial download entry sequence described
above. In fact, both serial download and serial port debug modes
can be thought of as essentially one mode of operation used in
two different ways.
Note that the serial port debugger is fully contained on the ADuC831
device, (unlike ROM monitor type debuggers) and therefore no
external memory is needed to enable in-system debug sessions.
Single-Pin Emulation Mode
Also built into the ADuC831 is a dedicated controller for
single-pin in-circuit emulation (ICE) using standard production
ADuC831 devices. In this mode, emulation access is gained by
connection to a single pin, the
EA pin. Normally, this pin is hard-
wired either high or low to select execution from internal or
external program memory space, as described earlier. To enable
single-pin emulation mode, however, users will need to pull the
EA pin high through a 1 k
resistor as shown in Figure 64. The
emulator will then connect to the 2-pin header also shown in
Figure 64. To be compatible with the standard connector that
comes with the single-pin emulator available from Accutron Lim-
ited (www.accutron.com), use a 2-pin 0.1-inch pitch “Friction
Lock” header from Molex (www.molex.com) such as their
part number 22-27-2021. Be sure to observe the polarity of this
header. As represented in Figure 64, when the Friction Lock tab
is at the right, the ground pin should be the lower of the two
pins (when viewed from the top).
Typical System Configuration
A typical ADuC831 configuration is shown in Figure 64. It sum-
marizes some of the hardware considerations discussed in the
previous paragraphs.
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