I2C Read and Write Operations Figure 22 shows th" />
參數(shù)資料
型號(hào)： EVAL-ADAU1701MINIZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 19/53頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL SIGMADSP AUD ADAU1701
標(biāo)準(zhǔn)包裝： 1
系列： SigmaDSP®
類型： DSP：音頻
適用于相關(guān)產(chǎn)品： ADAU1701
所含物品： 板，線纜
產(chǎn)品目錄頁(yè)面： 776 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： ADAU1701JSTZ-RL-ND - IC AUDIO PROC 2ADC/4DAC 48-LQFP
ADAU1701JSTZ-ND - IC AUDIO PROC 2ADC/4DAC 48-LQFP
其它名稱： ADAU1701MINIBZ
ADAU1701MINIBZ-ND
ADAU1701MINIZ
ADAU1701MINIZ-ND
ADAU1701
Rev. B | Page 25 of 52
I2C Read and Write Operations
Figure 22 shows the timing of a single-word write operation.
Every ninth clock, the ADAU1701 issues an acknowledge by
pulling SDA low.
Figure 23 shows the timing of a burst mode write sequence.
This figure shows an example where the target destination
registers are two bytes. The ADAU1701 knows to increment
its subaddress register every two bytes because the requested
subaddress corresponds to a register or memory area with a
2-byte word length.
The timing of a single-word read operation is shown in
Figure 24. Note that the first R/W bit is 0, indicating a write
operation. This is because the subaddress still needs to be
written to set up the internal address. After the ADAU1701
acknowledges the receipt of the subaddress, the master must
issue a repeated start command followed by the chip address
byte with the R/W set to 1 (read). This causes the ADAU1701
SDA to reverse and begin driving data back to the master. The
master then responds every ninth pulse with an acknowledge
pulse to the ADAU1701.
Figure 25 shows the timing of a burst mode read sequence. This
figure shows an example where the target read registers are two
bytes. The ADAU1701 increments its subaddress every two bytes
because the requested subaddress corresponds to a register or
memory area with word lengths of two bytes. Other addresses
may have word lengths ranging from one to five bytes. The
ADAU1701 always decodes the subaddress and sets the auto-
increment circuit so that the address increments after the
appropriate number of bytes.
Figure 22 to Figure 25 use the following abbreviations:
S = start bit
P = stop bit
AM = acknowledge by master
AS = acknowledge by slave
S
AS
SUBADDRESS
LOW
DATA BYTE 1
DATA BYTE 2
AS
P
DATA BYTE N
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
06
412
-0
22
Figure 22. Single Word I2C Write Format
S
AS
SUBADDRESS
LOW
DATA-
WORD 1,
BYTE 1
DATA-
WORD 1,
BYTE 2
DATA-
WORD 2,
BYTE 1
DATA-
WORD 2,
BYTE 2
AS
P
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
064
12-
02
3
Figure 23. Burst Mode I2C Write Format
S
AS
S
SUBADDRESS
LOW
AM
AS
DATA
BYTE 1
DATA
BYTE 2
DATA
BYTE N
P
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
CHIP ADDRESS,
R/W = 1
06
41
2-
024
Figure 24. Single-Word I2C Read Format
S
AS
S
SUBADDRESS
LOW
AM
AS
DATA-
WORD 1,
BYTE 1
AM
DATA-
WORD 1,
BYTE 2
P
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
CHIP ADDRESS,
R/W = 1
0
64
12
-0
25
Figure 25. Burst Mode I2C Read Format
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-ADAU1701MINIZ 制造商:Analog Devices 功能描述:ADAU1701MINIZ EvaluationBoard
EVAL-ADAU1702EB 制造商:AD 制造商全稱:Analog Devices 功能描述:SigmaDSP 28-56-Bit Audio Processor with Two ADCs and Four DACs
EVAL-ADAU1702EBZ 制造商:Analog Devices 功能描述:EVALBRD SIGMADSP28/56-B AUDIOPR2ADC/4DAC - Bulk
EVAL-ADAU1761Z 功能描述:BOARD EVAL FOR ADAU1761 RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:SigmaDSP® 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源
EVAL-ADAU1781Z 功能描述:BOARD EVAL FOR ADAU1781 RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:SigmaDSP® 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081
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