參數(shù)資料
型號: EVAL-AD7152EBZ
廠商: Analog Devices Inc
文件頁數(shù): 23/24頁
文件大?。?/td> 0K
描述: BOARD EVAL AD7152
標(biāo)準(zhǔn)包裝: 1
傳感器類型: 觸摸,電容式
接口: I²C
電源電壓: 2.7 V ~ 3.6 V
嵌入式:
已供物品: 板,CD
已用 IC / 零件: AD7152
產(chǎn)品目錄頁面: 781 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: AD7152BRMZ-ND - IC CDC 12BIT 2/4CH 10MSOP
AD7152BRMZ-REEL-ND - IC CDC 12BIT 2/4CH 10MSOP
AD7152/AD7153
Rev. 0 | Page 8 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
0.05
0.04
0.03
0.02
0.01
0
0.01
0.02
0.03
0.04
0.05
–2
–1
0
1
2
CAPACITANCE (pF)
IN
L
(
%
o
fF
S
R
)
07
45
0-
1
06
Figure 6. Capacitance Input Integral Nonlinearity,
VDD = 3.3 V, See Figure 34
–0.25
–0.20
–0.15
–0.10
–0.05
0.00
0.05
0.10
0.15
0.20
50
25
0
25
50
75
100
TEMPERATURE (°C)
G
AI
N
E
RRO
R
(
%
F
S
R)
07
45
0-
10
7
TC ≈ 28ppm/°C
Figure 7. Capacitance Input Gain Drift vs. Temperature,
VDD = 3.3 V, Range = ±2 pF
–0.4
–0.2
0
0.2
0.4
–50
–25
0
25
50
75
100
TEMPERATURE (°C)
O
F
S
E
T
CA
P
ACI
T
ANCE
(
fF
)
07
45
0-
10
8
Figure 8. Capacitance Input Offset Drift vs. Temperature,
VDD = 3.3 V, CIN and EXC Pins Open Circuit
–12
–10
–8
–6
–4
–2
0
2
0
50
100
150
200
250
300
350
CAP LOAD TO GND (pF)
G
AI
N
E
R
RO
R
(
%
F
S
R)
3pF
9pF
0
745
0-
1
09
Figure 9. Capacitance Input Error vs. Capacitance Between CIN and GND;
Single-Ended Mode, CIN(+) to EXC = 3 pF and 9 pF, VDD = 3.3 V
–12
–10
–8
–6
–4
–2
0
2
0
50
100
150
200
250
300
350
CAP LOAD TO GND (pF)
G
AI
N
E
RRO
R
(
%
F
S
R)
2pF
07
45
0-
11
0
8pF
Figure 10. Capacitance Input Error vs. Capacitance Between CIN and GND,
Differential Mode, CIN(+) to EXC = 2 pF and 8 pF,
CIN() to EXC = 0 pF and 6 pF, VDD = 3.3 V
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0
50
100
150
200
250
300
350
CAP LOAD TO GND (pF)
G
A
IN
E
R
RO
R
(
%
F
S
R
)
07
45
0-
11
1
Figure 11. Capacitance Input Error vs. Capacitance Between EXC and GND,
Single-Ended Mode, CIN(+) to EXC = 9 pF, VDD = 3.3 V
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