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| 型號： | EVAL-AD7152EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL AD7152 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 傳感器類型： | 觸摸，電容式 |
| 接口： | I²C |
| 電源電壓： | 2.7 V ~ 3.6 V |
| 嵌入式： | 否 |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | AD7152 |
| 產(chǎn)品目錄頁面： | 781 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | AD7152BRMZ-ND - IC CDC 12BIT 2/4CH 10MSOP AD7152BRMZ-REEL-ND - IC CDC 12BIT 2/4CH 10MSOP |
AD7152/AD7153
Rev. 0 | Page 3 of 24
SPECIFICATIONS
VDD = 2.7 V to 3.6 V; GND = 0 V; 40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Test Conditions/Comments
CAPACITIVE INPUT
Capacitive Input Ranges
±2
pF
Differential mode
±1
pF
±0.5
pF
±0.25
pF
4
pF
Single-ended mode
2
pF
1
pF
0.5
pF
Gain Matching Between Ranges
±3
% of FS
Integral Nonlinearity (INL)2
±0.05
% of FS
No Missing Codes2
12
Bits
Resolution, p-p2, 3
10
Bits
25°C, VDD = 3.3 V, 4 pF range
Resolution Effective2, 3
12
Bits
25°C, VDD = 3.3 V, 4 pF range
Absolute Error4
±20
fF
25°C, VDD = 3.3 V, after system offset
calibration, ±2 pF range
System Offset Calibration Range5, 6
40
% of FSR
Offset Deviation over Temperature2
1
5
fF
Single-ended mode, CIN and EXC
pins disconnected, see Figure 8
0.3
1
fF
Differential mode, CIN and EXC
pins disconnected
Gain Error7
0.5
% of FSR
25°C, VDD = 3.3 V
Gain Deviation over Temperature2
0.3
0.4
% of FSR
See Figure 7
Allowed Capacitance, CIN to GND2
50
pF
Allowed Resistance, CIN to GND2
10
MΩ
See Figure 13
Allowed Serial Resistance2
20
kΩ
See Figure 16
Power Supply Rejection DC
2
fF/V
See Figure 17
Normal-Mode Rejection2
70
dB
50 Hz ± 1 Hz, conversion time = 60 ms
70
dB
60 Hz ± 1 Hz, conversion time = 50 ms
Channel-to-Channel Isolation2
70
dB
AD7152 only
CAPDAC
Full Range
5
6.25
pF
200
fF
5-bit CAPDAC
Differential Nonlinearity (DNL)2
0.25
LSB
Offset Deviation over Temperature2
0.3
% of CAPDAC FSR
Single-ended mode
EXCITATION
Frequency
30.9
32
32.8
kHz
Voltage
±VDD/2
V
Allowed Capacitance, EXC to GND2
300
pF
SERIAL INTERFACE LOGIC INPUTS (SCL, SDA)
Input High Voltage, VIH
1.5
V
Input Low Voltage, VIL
0.8
V
Input Leakage Current (SCL)
±0.1
±5
μA
OPEN-DRAIN OUTPUT (SDA)
Output Low Voltage, VOL
0.4
V
ISINK =
6.0 mA
Output High Leakage Current, IOH
0.1
5
μA
VOUT = VDD
POWER SUPPLY MONITOR
Threshold Voltage, VDD
2.45
2.65
V
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