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| 型號： | EVAL-AD7152EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/24頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL AD7152 |
| 標準包裝： | 1 |
| 傳感器類型： | 觸摸，電容式 |
| 接口： | I²C |
| 電源電壓： | 2.7 V ~ 3.6 V |
| 嵌入式： | 否 |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | AD7152 |
| 產(chǎn)品目錄頁面： | 781 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | AD7152BRMZ-ND - IC CDC 12BIT 2/4CH 10MSOP AD7152BRMZ-REEL-ND - IC CDC 12BIT 2/4CH 10MSOP |
AD7152/AD7153
Rev. 0 | Page 19 of 24
CAPDAC
The CDC full-scale input range of the AD7152/AD7153 can
be set to ±0.25 pF, ±0.5 pF, ± 1 pF, and ±2 pF in differential
mode or 0.5 pF, 1 pF, 2 pF, and 4 pF in single-ended mode.
For simplicity, the following text and figures use the maximum
full scale of ±2 pF and +4 pF.
The parts can accept a higher capacitance on the input and the
common-mode or offset capacitance (unchanging component)
can be balanced by programmable on-chip CAPDACs.
DATA
CDC
EXC
CIN(+)
CIN(–)
CX
CAPDAC(+)
CAPDAC(–)
CY
07
45
0-
0
10
Figure 28. Using a CAPDAC
The CAPDAC can be understood as a negative capacitance
connected internally to the CIN pin. There are two independent
CAPDACs, one connected to the CIN(+) and the second
connected to the CIN(–).
In differential mode, the relationship between the capacitance
input and output data can be expressed as
DATA ≈ (CX CAPDAC(+)) (CY CAPDAC())
In single-ended mode, the relationship between the capacitance
input and output data can be expressed as
DATA ≈ CX (CAPDAC(+) + CAPDAC())
The CAPDACs have a 5-bit resolution each, monotonic transfer
function, are well matched to each other, and have a defined
temperature coefficient. The CAPDAC full range (absolute
value) is not factory calibrated and can vary up to ±20% with
the manufacturing process (see the Specifications section
,
, and Figure 19).
The CAPDACs are shared by the two capacitive channels on the
AD7152. If the CAPDACs need to be set individually, the host
controller software should reload the CAPDAC values to the
AD7152 before executing a conversion on a different channel.
SINGLE-ENDED CAPACITIVE INPUT
When configured for a single-ended mode (the CAPDIFF bit in
the Channel 1 Setup or Channel 2 Setup registers is set to 0), the
AD7152/AD7153 CIN() pin is disconnected internally. The
CDC (without using the CAPDACs) can measure positive input
capacitance in the range of 0 pF to 4 pF (see Figure 29).
0x0000 ... 0xFFF0
DATA
CAPDIFF = 0
0pF TO 4pF
CDC
EXC
CIN(+)
CIN(–)
CX
0pF TO 4pF
CAPDAC(+)
OFF
CAPDAC(–)
OFF
07
45
0-
0
24
Figure 29. CDC Single-Ended Input Mode
The CAPDAC can be used for programmable shifting of the
input range.
Figure 30 shows how to shift the input range up to 9 pF absolute
value of capacitance connected to the CIN(+) using
the CAPDAC(+) only.
0x0000 ... 0xFFF0
DATA
CAPDIFF = 0
0pF TO 4pF
CDC
EXC
CIN(+)
CIN(–)
CX
5pF TO 9pF
CAPDAC(+)
5pF
CAPDAC(–)
OFF
07
45
0-
1
24
Figure 30. Using CAPDAC in Single-Ended Mode
Figure 31 shows how to shift the input range up to 14 pF
absolute value of capacitance connected to the CIN(+) using
both CAPDAC(+) and CAPDAC().
0x0000 ... 0xFFF0
DATA
CAPDIFF = 0
0pF TO 4pF
CDC
EXC
CIN(+)
CIN(–)
CX
10pF TO 14pF
CAPDAC(+)
5pF
CAPDAC(–)
5pF
07
45
0-
2
24
Figure 31. Using CAPDAC in Single-Ended Mode
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