參數(shù)資料
型號(hào)： EVAL-AD5934EB
廠商： Analog Devices, Inc.
英文描述： 250 kSPS, 12-Bit Impedance Converter, Network Analyzer
中文描述： 250 kSPS的，12位阻抗轉(zhuǎn)換器，網(wǎng)絡(luò)分析儀
文件頁(yè)數(shù)： 1/32頁(yè)
文件大?。?/td> 335K
代理商： EVAL-AD5934EB
250 kSPS, 12-Bit Impedance Converter,
Network Analyzer
AD5934
FEATURES
Programmable output peak-to-peak excitation voltage
to a max frequency of 100 kHz
Programmable frequency sweep capability with
serial I
2
C interface
Frequency resolution of 27 bits (<0.1 Hz)
Impedance measurement range from 100 Ω to 10 MΩ
Phase measurement capability
System accuracy of 0.5%
2.7 V to 5.5 V power supply operation
Temperature range 40°C to +125°C
16-lead SSOP package
APPLICATIONS
Electrochemical analysis
Bioelectrical impedance analysis
Impedance spectroscopy
Complex impedance measurement
Corrosion monitoring and protection equipment
Biomedical and automotive sensors
Proximity sensing
Nondestructive testing
Material property analysis
Fuel/battery cell condition monitoring
Rev.
0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2005 Analog Devices, Inc. All rights reserved.
www.analog.com
GENERAL DESCRIPTION
The AD5934 is a high precision impedance converter system
solution which combines an on-board frequency generator with
a 12-bit, 250 kSPS, analog-to-digital converter (ADC). The
frequency generator allows an external complex impedance to
be excited with a known frequency. The response signal from
the impedance is sampled by the on-board ADC and a discrete
Fourier transform (DFT) is processed by an on-board DSP
engine. The DFT algorithm returns a real (R) and imaginary (I)
data-word at each output frequency.
The magnitude of the impedance and relative phase of the
impedance at each frequency point along the sweep is easily
calculated using the following two equations:
2
2
I
R
Magnitude
+
=
)
/
(
1
R
I
Tan
Phase
=
Table 1. Related Devices
Part No.
Description
AD5933
2.7 V to 5.5 V. 1 MSPS, 12-bit impedance, with
internal temperature sensor, 16-lead SSOP.
FUNCTIONAL BLOCK DIAGRAM
(1ADC
VDD/2
(2DDS
DAC
Z(
ω
)
2
C
INTI
IREGISTER
GAIN
RREAL
1024-POINT DFT
LPF
SCL
SDA
DVDD
AVDD
MCLK
AGND
DGND
R
OUT
VOUT
AD5934
RFB
VIN
0
Figure 1.
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