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參數(shù)資料
| 型號： | EVAL-AD1953EB |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 具有閃存的 16 位定點 DSP |
| 文件頁數(shù)： | 9/36頁 |
| 文件大?。?/td> | 750K |
| 代理商： | EVAL-AD1953EB |
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AD1953
–9–
PRODUCT OVERVIEW
(continued from page 1)
An extensive SPI port allows click-free parameter updates, along
with readback capability from any point in the algorithm flow.
The AD1953 also includes ADI’s patented multibit
Σ
-
DAC
architecture. This architecture provides 112 dB SNR and dynamic
range and THD+N of –100 dB. These specifications allow the
AD1953 to be used in applications ranging from low end
boom-boxes to high end professional mixing/editing systems.
The AD1953 has a digital output that allows it to be used purely
as a DSP. This digital output can also be used to drive an exter-
nal DAC to extend the number of channels beyond the three
that are provided on the chip. This chip can be used with either
its default signal processing program or with a custom user-
designed program. Graphical programming tools are available
from ADI for custom programming.
Features
The AD1953 is comprised of a 26-bit DSP (48-bit with double-
precision) for interpolation and audio processing, three multibit
Σ
-
modulators, and analog output drive circuitry. Other features
include an on-chip parameter RAM using a “safe-upload” feature
for transparent and simultaneous updates of filter coefficients.
Digital de-emphasis filters are also included. On-chip input
selectors allow up to three sources of serial data and master
clock to be selected. The 3-channel configuration is especially
useful for 2.1 playback systems that include two
satellite speakers
and a subwoofer. The default program
allows for independent
equalization and compression/limiting for the satellite and
subwoofer outputs. Figure 1 shows the block diagram of the device.
The AD1953 contains a program RAM that is booted from an
internal program ROM on power-up. Signal-processing param-
eters are stored in a 256-location parameter RAM, which is
initialized on power-up by an internal boot ROM. New values
are written to the parameter RAM using the SPI port. The
values stored in the parameter RAM control the IIR equalization
filters, the dual-band compressor/limiter, the delay values, and
the settings of the stereo spreading algorithm.
The AD1953 has a very sophisticated SPI port that supports
complete read/write capability of both the program RAM and
the parameter RAM. Two control registers are also provided to
control the chip serial modes and various other optional fea-
tures. Handshaking is included for ease of memory uploads/
downloads.
The AD1953 contains eight independent data-capture circuits
that can be programmed to tap the signal flow of the processor
at any point in the DSP algorithm flow. Two of these data-
capture circuits can be read back over the SPI port, and the
other six are fed to a serial output pin operating either in TDM
mode (for all six channels) or 2-channel mode for simple con-
nection to an external DAC. This allows the basic functionality
of the AD1953 to be easily extended.
The processor core in the AD1953 has been designed from the
ground up for straightforward coding of sophisticated compres-
sion/limiting algorithms. The AD1953 contains two independent
compressor/limiters with rms based amplitude detection and
attack/hold/release controls, together with an arbitrary compres-
sion curve that is loaded by the user into a lookup table that
resides in the parameter RAM. The compressor also features
look-ahead compression, which prevents compressor overshoots.
The AD1953 has a very flexible serial data input port that allows
for glueless interconnection to a variety of ADCs, DSP chips,
AES/EBU receivers, and sample rate converters. The AD1953
can be configured in left-justified, I
2
S, right-justified, or DSP
serial port compatible modes. It can support 16, 20, and 24 bits
in all modes. The AD1953 accepts serial audio data in MSB
first, twos complement format. The part can also be set up in a
4-channel serial input mode by simultaneously using the serial
input mux and the auxiliary serial input.
The AD1953 operates from a single 5 V power supply. It is
fabricated on a single monolithic integrated circuit and is housed
in a 48-lead LQFP package for operation over the temperature
range –40
°
C to +105
°
C.
3:1
AUDIO
DATA
MUX
1
3
3
SPI PORT
3:1
MCLK
MUX
1
MCLK
GENERATOR
1
(256/512 f
IN)
256/512 f
S
OUT
DAC – L
COEFFICIENT
ROM
64 22
26 22
DSP CORE
DATA FORMAT:
3.23 (SINGLE PRECISION)
3.45 (DOUBLE PRECISION)
3
3
ANALOG
OUTPUTS
MASTER
CLOCK I/O
GROUP
DCSOUT
SPI I/O
GROUP
3
SERIAL
IN
DATA MEMORY, 512 26
CONTROL
REGISTERS
TRAP REG.
(I
S, SPI)
SAFELOAD
REGISTERS
PROGRAM
RAM
512 35
PARAMETER
RAM
256 22
B
MEMORY CONTROLLERS
DAC – R
DAC –SW
2
BIAS
ANALOG
BIAS
RESETB MUTE
DE-EMPHASIS
ZEROFLAG
NOTES
1
CONTROLLED THROUGH SPI CONTROL REGISTERS
2
DAC DOES NOT USE DIGITAL INTERPOLATION
SERIAL DATA I/O
GROUP
DCSOUT TRAP
AUX SERIAL
DATA INPUT
(2-CHANNEL
AND TDM)
FILTCAP
AGND
3
DGND
2
VOLTAGE
REFERENCE
VREF
DVDD
AVDD ODVDD
3
B
Figure 1. Block Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
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| EVAL-AD1953EBZ | 制造商:Analog Devices 功能描述:EVAL BRD FOR 3 CH 24 BIT SIG-PROCESS DAC - Bulk |
| EVAL-AD1954EB | 制造商:Rochester Electronics LLC 功能描述:EVAL BRD FOR 3 CH 24 BIT SIG-PROCESS DAC - Bulk 制造商:Analog Devices 功能描述: |
| EVAL-AD1955EB | 制造商:Analog Devices 功能描述:Evaluation Board For AD1955 制造商:Analog Devices 功能描述:EVAL BOARD FOR 24 BIT 192KHZ DAC 120 DB - Bulk 制造商:Rochester Electronics LLC 功能描述:EVAL BOARD FOR 24 BIT 192KHZ DAC 120 DB - Bulk |
| EVAL-AD1955EBZ | 功能描述:BOARD EVAL FOR AD1955 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD1955EBZ | 制造商:Analog Devices 功能描述:EVAL BOARD, AD1955 STEREO DIGITAL AUDIO |
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