- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄362799 > EVAL-AD1953EB (Analog Devices, Inc.) 16-bit fixed point DSP with Flash PDF資料下載
參數(shù)資料
| 型號： | EVAL-AD1953EB |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 具有閃存的 16 位定點(diǎn) DSP |
| 文件頁數(shù)： | 7/36頁 |
| 文件大小： | 750K |
| 代理商： | EVAL-AD1953EB |
第1頁第2頁第3頁第4頁第5頁第6頁當(dāng)前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
REV. 0
AD1953
–7–
PIN FUNCTION DESCRIPTIONS
Input/
Output
Pin No.
Mnemonic
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
NC
MCLK2
MCLK1
MCLK0
AUXDATA
MUTE
DVDD
SDATA2
BCLK2
LRCLK2
SDATA1
BCLK1
DGND
LRCLK1
SDATA0
BCLK0
LRCLK0
CDATA
CCLK
CLATCH
RESETB
AVDD
AGND
NC
VOUTS–
VOUTS+
AGND
VOUTR–
VOUTR+
AVDD
AGND
AVDD
VOUTL+
VOUTL–
AGND
NC
NC
VREF
FILTCAP
ZEROFLAG
DMUXO/TDMO
BMUXO/TDMBC
LRMUXO/TDMFS
No Connect
Master Clock Input 2 256/512 f
S
Master Clock Input 1 256/512 f
S
Master Clock Input 0 256/512 f
S
Auxiliary Serial Data Input
Mute Signal, Initiates Volume Ramp-Down
Digital Supply for DSP Core, 4.5 V to 5.5 V
Serial Data Input 2
Bit Clock 2
Left/Right Clock 2
Serial Data Input 1
Bit Clock 1
Digital Ground
Left/Right Clock 1
Serial Data Input 0
Bit Clock 0
Left/Right Clock 0
SPI Data Input
SPI Data Bit Clock
SPI Data Framing Signal
Reset Signal, Active Low
Analog 5 V Supply
Analog GND
No Connect
Negative Sub Analog DAC Output
Positive Sub Analog DAC Output
Analog GND
Negative Left Analog DAC Output
Positive Left Analog DAC Output
Analog 5 V Supply
Analog GND
Analog 5 V Supply
Positive Left Analog DAC Output
Negative Left Analog DAC Output
Analog GND
No Connect
No Connect
Connection for Filtered AVDD/2
Connection for Noise Reduction Capacitor
Zero Flag Output. High when both left and right channels are 0 for 1024 frames.
Dual-function Pin: Serial Data MUX Output/TDM Mode Output Data
Dual-function Pin: Bit Clock MUX Output/TDM Mode Bit Clock Output (256 f
S
)
Dual-function Pin: Left/Right Clock MUX Output/TDM Mode Frame Sync
Clock Output
Digital Supply Pin for Output Drivers, 2.5 V to 5.5 V
Data Capture Serial Output for Data Capture Registers. Use in conjunction
with selected LRCLK and BCLK to form a 3-wire output.
SPI Data Output, Three-Stated when Inactive
Master Clock Output 512/256 f
S
(Frequency Selected by SPI Register)
Digital Ground
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
44
45
ODVDD
DCSOUT
OUT
46
47
48
COUT
MCLKOUT
DGND
OUT
OUT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EVAL-AD1958EB | PLL/Multibit DAC |
| EVAL-AD1959EB | PLL/Multibit DAC |
| EVAL-AD1974EB | 4 ADC with PLL, 192 kHz, 24-Bit Codec |
| EVAl-AD1974EBZ | 4 ADC with PLL, 192 kHz, 24-Bit Codec |
| EVAL-AD1990EB | Audio Switching Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD1953EBZ | 制造商:Analog Devices 功能描述:EVAL BRD FOR 3 CH 24 BIT SIG-PROCESS DAC - Bulk |
| EVAL-AD1954EB | 制造商:Rochester Electronics LLC 功能描述:EVAL BRD FOR 3 CH 24 BIT SIG-PROCESS DAC - Bulk 制造商:Analog Devices 功能描述: |
| EVAL-AD1955EB | 制造商:Analog Devices 功能描述:Evaluation Board For AD1955 制造商:Analog Devices 功能描述:EVAL BOARD FOR 24 BIT 192KHZ DAC 120 DB - Bulk 制造商:Rochester Electronics LLC 功能描述:EVAL BOARD FOR 24 BIT 192KHZ DAC 120 DB - Bulk |
| EVAL-AD1955EBZ | 功能描述:BOARD EVAL FOR AD1955 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD1955EBZ | 制造商:Analog Devices 功能描述:EVAL BOARD, AD1955 STEREO DIGITAL AUDIO |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。