參數(shù)資料
型號: EPM7032B
廠商: Altera Corporation
英文描述: Programmable Logic Device Family(MAX7000B可編程邏輯系列器件)
中文描述: 可編程邏輯器件系列(MAX7000B可編程邏輯系列器件)
文件頁數(shù): 77/125頁
文件大?。?/td> 1053K
代理商: EPM7032B
76
Altera Corporation
MAX 7000B Programmable Logic Device Family Data Sheet
Preliminary Information
Notes to tables:
(1)
This pin may function as either a JTAG port or a user I/O pin. If the device is configured to use the JTAG ports for
in-system programming, this pin is not available as a user I/O pin.
(2)
This pin may function as either a
VREF
pin or a user I/O pin. If this pin is programmed to be a
VREF
pin for using
the advanced I/O standards, then this pin is not available as a user I/O pin.
(3)
The user I/O pin count includes dedicated input pins and all I/O pins.
Table 50. EPM7256B I/O Pin-Outs & I/O Standards (Part 1 of 9)
LAB
MC
208-Pin
PQFP
(4)
IOGND
group for
208-Pin PQFP
(200 mA)
256-Pin
FineLine
BGA
IOGND
group for
256-Pin
FineLine BGA
(200 mA)
IOVCC
group for
208 &
256-Pin
Packages
I/O
Bank
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
153
154
159
160
161
162
163
164
166
167
B
B
B
B
B
B
B
B
B
B
C3
C4
E5
D5
C5
B4
A4
A5
D6
C6
B
B
B
B
B
B
B
B
B
B
B (200 mA)
B (200 mA)
B (200 mA)
B (200 mA)
B (200 mA)
B (200 mA)
B (200 mA)
B (200 mA)
A (100 mA)
A (100 mA)
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
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