參數(shù)資料
型號: EPM7032B
廠商: Altera Corporation
英文描述: Programmable Logic Device Family(MAX7000B可編程邏輯系列器件)
中文描述: 可編程邏輯器件系列(MAX7000B可編程邏輯系列器件)
文件頁數(shù): 21/125頁
文件大小: 1053K
代理商: EPM7032B
Altera Corporation
21
MAX 7000B Programmable Logic Device Family Data Sheet
Preliminary Information
MAX 7000B devices contain two I/ O banks. Both banks support all
standards. Each I/ O bank has its own
VCCIO
pins. A single device can
support 1.8-V, 2.5-V, and 3.3-V interfaces; each bank can support a
different standard independently. Within a bank, any one of the
terminated standards can be supported.
Figure 9
shows the arrangement of the MAX 7000B I/ O banks.
Figure 9. MAX 7000B I/O Banks for Various Advanced I/O Standards
Table 9
shows which macrocells have pins in each I/ O bank.
Each MAX 7000B device has two
VREF
pins. Each can be set to a separate
VREF level. Any I/ O pin that uses one of the voltage-referenced
standards (GTL+, SSTL2, or SSTL3) may use either of the two
VREF
pins.
If these pins are not required as
VREF
pins, they may be individually
programmed to function as user I/ O pins.
Table 9. Macrocells Contained in Each I/O Bank
Device
Bank 1
Bank 2
EPM7032B
EPM7064B
EPM7128B
EPM7256B
EPM7512B
1-16
1-32
1-64
17-32
33-64
65-128
1-128, 177-181
1-265
129-176, 182-256
266-512
Individual
Power Bus
Programmable I/O Banks
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