參數(shù)資料
型號(hào): EPM7032B
廠商: Altera Corporation
英文描述: Programmable Logic Device Family(MAX7000B可編程邏輯系列器件)
中文描述: 可編程邏輯器件系列(MAX7000B可編程邏輯系列器件)
文件頁數(shù): 13/125頁
文件大?。?/td> 1053K
代理商: EPM7032B
Altera Corporation
13
MAX 7000B Programmable Logic Device Family Data Sheet
Preliminary Information
Figure 6. I/O Control Block of MAX 7000B Devices
When the tri-state buffer control is connected to ground, the output is
tri-stated (high impedance) and the I/ O pin can be used as a dedicated
input. When the tri-state buffer control is connected to V
CC
, the output is
enabled.
The MAX 7000B architecture provides dual I/ O feedback, in which
macrocell and pin feedbacks are independent. When an I/ O pin is
configured as an input, the associated macrocell can be used for buried
logic.
from
Macrocell
Fast Input to
Macrocell
Register
Slew-Rate Control
I/O Standards
to PIA
to Other I/O Pins
6 or 10 Global
Output Enable Signals
(1)
PIA
VCC
Open-Drain Output
OE Select Multiplexer
GND
Programmable Delay
Bus Hold
Programmable
Ground
Programmable
Pull-up
Note:
(1)
EPM7032B, EPM7064B, EPM7128B, and EPM7256B devices have six output enable signals. EPM7512B devices
have ten output enable signals.
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