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參數(shù)資料
| 型號： | EP7212 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI) |
| 中文描述： | 高性能，低功耗系統(tǒng)與LCD控制器和數(shù)字音頻接口（DAI芯片） |
| 文件頁數(shù)： | 89/136頁 |
| 文件大?。?/td> | 2289K |
| 代理商： | EP7212 |
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EP7212
DS474PP1
89
5.16.2
DAI Data Registers
The DAI contains three data registers: DAIDR0 addresses the top entry of the Right Channel Transmit
FIFO and bottom entry of the Right Channel Receive FIFO; DAIDR1 addresses the top and bottom entry
of the Left Channel Transmit and Receive FIFOs, respectively; and DAIDR2 is used to perform enable and
disable the DAI FIFOs.
5.16.2.1
DAIDR0 DAI Data Register 0
ADDRESS: 0x8000.2040
When DAI Data Register 0 (DAIDR0) is read, the bottom entry of the Right Channel Receive FIFO is
accessed. As data is removed by the DAI’s receive logic from the incoming data frame, it is placed
into the top entry of the Right Channel Receive FIFO and is transferred down an entry at a time until
it reaches the last empty location within the FIFO. Data is removed by reading DAIDR0, which ac-
cesses the bottom entry of the right channel FIFO. After DAIDR0 is read, the bottom entry is invali-
dated, and all remaining values within the FIFO automatically transfer down one location.
When DAIDR0 is written, the top-most entry of the Right Channel Transmit FIFO is accessed. After a
write, data is automatically transferred down to the lowest location within the transmit FIFO which
does not already contain valid data. Data is removed from the bottom of the FIFO one value at a time
by the transmit logic, loaded into the correct position within the 64-bit transmit serial shifter, then se-
rially shifted out onto the SDOUT pin.
Table 51
shows DAIDR0. Note that the Transmit and Receive Right Channel FIFOs are cleared when
the device is reset, or by writing a zero to DAIEN (DAI disabled). Also, note that writes to reserved
bits are ignored and reads return zeros.
31:16
Reserved
15:0
Bottom of Right Channel Receive FIFO
Read Access
31:16
Reserved
15:0
Top of Right Channel Transmit FIFO
Write Access
Bit
0:15
Description
RIGHT CHANNEL DATA:
Transmit / Receive Right Channel FIFO Data
Read — Bottom of Right Channel Receive FIFO data
Write — Top of Right Channel Transmit FIFO data
Reserved
16:31
Table 51. DAI Data Register 0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EP7212-CB-A | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI) |
| EP7212-CV-A | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI) |
| EP7309 | HIGH PERFORMANCE LOW POWER SYSTEM ON CHIP ENHANCED DIGITAL AUDIO INTERFACE |
| EP7309-CB-C | CONN MODULAR JACK 8-8 R/A UNSHLD |
| EP7309-CR-C | HIGH PERFORMANCE LOW POWER SYSTEM ON CHIP ENHANCED DIGITAL AUDIO INTERFACE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EP7212-CB-A | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI) |
| EP7212-CV-A | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI) |
| EP7212-CV-D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| EP7230 | 功能描述:電氣外殼配件 E-PANEL FITS 72 X 30 RoHS:否 制造商:Hammond Manufacturing 產(chǎn)品:Rack Accessories 類型: 面板寬度: 面板高度: 外部寬度: 外部高度: 外部深度: 顏色:Black |
| EP7236 | 功能描述:電氣外殼配件 E-PANEL FITS 72 X 36 RoHS:否 制造商:Hammond Manufacturing 產(chǎn)品:Rack Accessories 類型: 面板寬度: 面板高度: 外部寬度: 外部高度: 外部深度: 顏色:Black |
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