參數(shù)資料
型號: EP7212
廠商: Cirrus Logic, Inc.
英文描述: HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
中文描述: 高性能,低功耗系統(tǒng)與LCD控制器和數(shù)字音頻接口(DAI芯片)
文件頁數(shù): 102/136頁
文件大小: 2289K
代理商: EP7212
EP7212
102
DS474PP1
tnCSWR
tADWR
t5
t6
t2
t7
t2
Bus held
Write data
Write data
eXPCLK
nCS[5:0]
nMWE
A[27:0]
WORD
D[31:0]
EXPRDY
t8
Figure 15. Consecutive Memory Write Cycles with Minimum Wait States
NOTES:
1)
tnCSWR = 35 nsec at 36.864 MHz
70 ns at 18.432 MHz
120 ns at 13.0 MHz
Maximum values for minimum wait states. This time can be extended by integer multiples of the
clock period (27 nsec at 36 MHz, 54 nsec at 18.432 MHz, and 77 nsec at 13 MHz), by either
driving EXPRDY low and/or by programming a number of wait states. EXPRDY is sampled on
the falling edge of EXPCLK before the data transfer. If low at this point, the transfer is delayed
by one clock period where EXPRDY is sampled again. EXPCLK need not be referenced when
driving EXPRDY, but is shown for clarity.
Consecutive reads with sequential access enabled are identical except that the sequential
access wait state field is used to determine the number of wait states, and no idle cycles are
inserted between successive non-sequential ROM/expansion cycles. This improves perfor-
mance so the SQAEN bit should always be set where possible.
Zero wait states for sequential writes is not permitted for memory devices which use nMWE pin,
as this cannot be driven with valid timing under zero wait state conditions.
2)
3)
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相關代理商/技術參數(shù)
參數(shù)描述
EP7212-CB-A 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
EP7212-CV-A 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)
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