參數(shù)資料
型號: EL5625ILZ-T13
廠商: Intersil
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: IC BUFFER 18XGAMMA PROG 38-QFN
標準包裝: 2,500
應用: TFT-LCD 面板:伽瑪緩沖器,VCOM 驅(qū)動器
輸出類型: 滿擺幅
電路數(shù): 18
電流 - 電源: 11mA
電流 - 輸出 / 通道: 130mA
電壓 - 電源,單路/雙路(±): 7 V ~ 16 V
安裝類型: 表面貼裝
封裝/外殼: 38-VFQFN 裸露焊盤
供應商設備封裝: 38-QFN(5x7)裸露焊盤
包裝: 帶卷 (TR)
7
FN7488.1
February 20, 2008
General Description
The EL5625 is designed to produce the reference voltages
required in TFT-LCD applications. Each output is
programmed to the required voltage with 11 bits of
resolution. Ref-High and Ref-Low pins determine the high
and low voltages of the output range. These outputs can be
driven to within 50mV of the power rails of the EL5625.
Programming of each output, 18 buffers and 1 Vcom, is
performed using the USB interface.
USB Interface
The EL5625 uses USB interface to control the 18 Gamma
channels and Vcom channel (Figure 7). Software is available
for download on Intersil’s website.
Serial Interface
The EL5625 is programmed through a three-wire serial
interface. The start and stop conditions are defined by the
ENA signal. While the ENA is low, the data on the SDI (serial
data input) pin is shifted into the 16-bit shift register on the
positive edge of the SCLK (serial clock) signal. The MSB
(bit 15) is loaded first and the LSB (bit 0) is loaded last (see
Table 1). After the full 16-bit data has been loaded, the ENA
is pulled high and the addressed output channel is updated.
The SCLK is disabled internally when the ENA is high. The
SCLK must be low before the ENA is pulled low.
The Serial Timing Diagram and parameters table show the
timing requirements for three-wire signals.
The serial data has a minimum length of 16 bits, the MSB
(most significant bit) is the first bit in the signal. The bits are
allocated to the following functions (also refer to the Control
Bits Logic Table).
Bits 15 through 11 select the channel to be written to, these
are binary coded with channel A = 0, and channel R = 17
The 11-bit data is on bits 10 through 0. Some examples of
data words are shown in the table of Serial Programming
Examples
FIGURE 7. USB INTERFACE
TABLE 1. CONTROL BITS LOGIC TABLE
BIT
NAME
DESCRIPTION
B15
A4
Channel Address
B14
A3
Channel Address
B13
A2
Channel Address
B12
A1
Channel Address
B11
A0
Channel Address
B10
D10
Data
B9
D9
Data
B8
D8
Data
B7
D7
Data
B6
D6
Data
B5
D5
Data
B4
D4
Data
B3
D3
Data
B2
D2
Data
B1
D1
Data
B0
D0
Data
EL5625
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