
MOTOROLA
DSP96002 USER’S MANUAL
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A - 9
Note 28
All bits - If SR is specified as a destination operand, set according to the corresponding bit of
the source operand. Not affected otherwise.
All bits - If SR is specified as destination operand, and A, –R, LR, I, N, Z, V or C is selected,
then the selected bit will be changed. If SR is not specified, then C will be set if bit #n of the
source operand is set and cleared if bit #n of the source operand is set. Not affected otherwise.
All bits - If SR is specified as destination operand, and A, –R, LR, I, N, Z, V or C is selected,
then the selected bit will be cleared. If SR is not specified, then C will be set if bit #n of the
source operand is set set and cleared if bit #n of the source operand is set. Not affected oth-
erwise.
All bits - If SR is specified as destination operand, and A, –R, LR, I, N, Z, V or C is selected,
then the selected bit will be set. If SR is not specified, then C will be set if bit #n of the source
operand is set set and cleared if bit #n of the source operand is set. Not affected otherwise.
A - Cleared if result is negative without overflow. Cleared if result is positive with overflow. Not
affected otherwise.
LR - Cleared if result is positive without overflow. Cleared if result is negative with overflow. Not
affected otherwise.
R - Cleared if LR was set and result is negative without overflow. Cleared if LR was set and
result is positive with overflow. Not affected otherwise.
A - Cleared if result is a NaN. Cleared if result is negative and not zero. Not affected otherwise.
LR - Cleared if result is positive, zero or NaN. Not affected otherwise.
R - Cleared if result is a NaN. Not affected otherwise.
R - Cleared if result is a NaN. Cleared if result is negative and not zero and LR was set. Not
affected otherwise.
C - Set if result is a NaN. Set if result is negative and not zero. Cleared otherwise.
Z - Set if source operands are equal. Cleared otherwise.
V - Set if source operand is a NaN, infinity or negative non-zero. Set if positive source operand
is too big to be representable in the integer number range. Cleared otherwise.
Note 29
Note 30
Note 31
Note 32
Note 33
Note 34
Note 35
Note 36
Note 37
Note 38
Note 39
Note 40
Note 41
A.4
Floating-point operations affect the seven status bits located in the IER register. The
of the ER bits is given below. These definitions are based on the ANSI/IEEE Standard 754-1985 which can
be ordered from:
EXCEPTION STATUS BITS COMPUTATION
standard definitions
IEEE
345 East 47th Street
New York, N.Y. 10017
Additional information (particularly relating to test cases ) can be found in J. T. Coonen,
Guide to a Proposed Standard for Floating-Point Arithmetic
the use of these bits are given in
Section 4.6
An Implementation
, Computer, 1980, pages 68-79. Examples of
Freescale Semiconductor, Inc.
.
INX
(Inexact) - Set if a floating-point mantissa, considered as having infinite precision, has too many
significant bits to be represented exactly in the current rounding precision. That is, a result is
inexact if there was a loss of accuracy due to rounding. Cleared otherwise. The INX bit is not
affected by fixed point operations. The INX bit is cleared during processor reset.
F
n
.