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參數(shù)資料
| 型號： | DSP56F827FG80E |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號控制器 |
| 文件頁數(shù)： | 17/60頁 |
| 文件大?。?/td> | 811K |
| 代理商： | DSP56F827FG80E |
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Signals and Package Information
56F827 Technical Data, Rev. 12
Freescale Semiconductor
17
SS
(GPIOF7)
99
Input/Output
Input/Output
SPI Slave Select
—In master mode, this pin is used to arbitrate multiple
masters. In slave mode, this pin is used to select the slave.
Port F GPIO
—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
After reset, the default state is SS.
TXD0
(SCLK0)
108
Output
Input/Output
Transmit Data (TXD0)
—transmit data output
SPI Serial Clock
—In master mode, this pin serves as an output, clocking
slaved listeners. In slave mode, this pin serves as the data clock input.
After reset, the default state is SCI output.
RXD0
(MOSI0)
107
Input
Input/Output
Receive Data (RXD0)
—receive data input
SPI Master Out/Slave In
—This serial data pin is an input to a master device
and an output from a slave device. The MISO line of a slave device is placed
in the high-impedance state if the slave device is not selected.
TXD1
(MISO0)
106
Output
Input/Output
Transmit Data (TXD1)
—transmit data output
SPI Master In/Slave Out
—This serial data pin is an output to a master device
and an input from a slave device. The master device places data on the MOSI
line one half-cycle before the clock edge the slave device uses to latch the
data.
After reset, the default state is SCI input.
RXD1
(SS0)
105
Input
(Schmitt)
Input
Receive Data (RXD1)
— receive data input
SPI Slave Select
—In master mode, this pin is used to arbitrate multiple
masters. In slave mode, this pin is used to select the slave.
After reset, the default state is SCI input.
TXD2
(GPIOC6)
104
Output
Input/Output
Transmit Data (TXD2)
—transmit data output
Port C GPIO
—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
After reset, the default state is GPIO output.
RXD2
(GPIOC7)
103
Input/Output
Input/Output
Receive Data (RXD2)
— receive data input
Port C GPIO
—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
After reset, the default state is GPIO input.
Table 2-2 56F827 Signal and Package Information for the 128 Pin LQFP (Continued)
Signal Name
Pin No.
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56F827 | 16-bit Hybrid Controller(16位混合控制器) |
| DSP8-08AC | Phase-leg Rectifier Diode ISOPLUS220 |
| DSP8-08 | Phase-leg Rectifier Diode |
| DSP8-08AS | Phase-leg Rectifier Diode |
| DSP8-08S | Phase-leg Rectifier Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56F827FG80E | 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor |
| DSP56F827FG80E | 制造商:Freescale Semiconductor 功能描述:DSP LQFP128 3.6V |
| DSP56F827PB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F827 16-Bit Hybrid Controller Product Brief |
| DSP56F827PB/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
| DSP56F8XXBLUM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F8xx Serial Bootloader User Manual |
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