參數(shù)資料
型號(hào): DSP56F827FG80E
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號(hào)控制器
文件頁(yè)數(shù): 15/60頁(yè)
文件大?。?/td> 811K
代理商: DSP56F827FG80E
Signals and Package Information
56F827 Technical Data, Rev. 12
Freescale Semiconductor
15
GPIOB0
124
Input/Output
Port B GPIO
—These eight dedicated General Purpose I/O (GPIO) pins can
be individually programmed as input or output pins.
After reset, the default state is GPIO input.
GPIOB1
123
GPIOB2
122
GPIOB3
121
GPIOB4
120
GPIOB5
119
GPIOB6
118
GPIOB7
117
GPIOD0
98
Input/ Output
Port D GPIO
—These eight dedicated GPIO pins can be individually
programmed as an input or output pins.
After reset, the default state is GPIO input.
GPIOD1
97
GPIOD2
96
GPIOD3
95
GPIOD4
94
GPIOD5
93
GPIOD6
92
GPIOD7
91
SRD
(GPIOC0)
55
Input/Output
Input/Output
SSI Receive Data (SRD)—
This input pin receives serial data and transfers the
data to the SSI Receive Shift Receiver.
Port C GPIO
—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
SRFS
(GPIOC1)
54
Input/Output
Input/Output
SSI Serial Receive Frame Sync (SRFS)
—This bidirectional pin is used by the
receive section of the SSI as frame sync I/O or flag I/O. The STFS can be
used only by the receiver. It is used to synchronize data transfer and can be an
input or an output.
Port C GPIO
—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
SRCK
(GPIOC2)
53
Input/Output
Input/Output
SSI Serial Receive Clock (SRCK)—
This bidirectional pin provides the serial
bit rate clock for the Receive section of the SSI. The clock signal can be
continuous or gated and can be used by both the transmitter and receiver in
synchronous mode.
Port C GPIO
—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
Table 2-2 56F827 Signal and Package Information for the 128 Pin LQFP (Continued)
Signal Name
Pin No.
Type
Description
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