
56858 Technical Data, Rev. 6
18
Freescale Semiconductor
STD0
GPIOC0
B6
131
Output
Input
/Output
ESSI Transmit Data (STD0)
—This output pin transmits serial data
from the ESSI Transmitter Shift Register.
Port C GPIO (0)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SRD0
GPIOC1
C6
132
Input
Input
/Output
ESSI Receive Data (SRD0)
—This input pin receives serial data and
transfers the data to the ESSI Receive Shift Register.
Port C GPIO (1)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SCK0
GPIOC2
C5
133
Input
/Output
Input/Output
ESSI Serial Clock (SCK0)
—This bidirectional pin provides the serial
bit rate clock for the transmit section of the ESSI. The clock signal can
be continuous or gated and can be used by both the transmitter and
receiver in synchronous mode.
Port C GPIO (2)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SC00
GPIOC3
D6
134
Input
/Output
Input/Output
ESSI Serial Control Pin 0 (SC00)
—The function of this pin is
determined by the selection of either synchronous or asynchronous
mode. For asynchronous mode, this pin will be used for the receive
clock I/O. For synchronous mode, this pin is used either for
transmitter1 output or for serial I/O flag 0.
Port C GPIO (3)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SC01
GPIOC4
B5
135
Input
/Output
Input/Output
ESSI Serial Control Pin 1 (SC01)
—The function of this pin is
determined by the selection of either synchronous or asynchronous
mode. For asynchronous mode, this pin is the receiver frame sync I/O.
For synchronous mode, this pin is used either for transmitter2 output
or for serial I/O flag 1.
Port C GPIO (4)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SC02
GPIOC5
E6
136
Input
/Output
Input or Output
ESSI Serial Control Pin 2 (SC02)
—This pin is used for frame sync
I/O. SC02 is the frame sync for both the transmitter and receiver in
synchronous mode and for the transmitter only in asynchronous mode.
When configured as an output, this pin is the internally generated
frame sync signal. When configured as an input, this pin receives an
external frame sync signal for the transmitter (and the receiver in
synchronous operation).
Port C GPIO (5)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA
Signal
Name
BGA
Pin No.
LQFP
Pin No.
Type
Description