參數(shù)資料
型號: DSP56366UM
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
元件分類: 數(shù)字信號處理
英文描述: 24-Bit Audio Digital Signal Processor
中文描述: 24位音頻數(shù)字信號處理器
文件頁數(shù): 42/110頁
文件大?。?/td> 1273K
代理商: DSP56366UM
DSP56366 Technical Data, Rev. 3.1
3-16
Freescale Semiconductor
3.10.2
DRAM Timing
The selection guides provided in
Figure 3-11
and
Figure 3-14
should be used for primary selection only.
Final selection should be based on the timing provided in the following tables. As an example, the selection
guide suggests that 4 wait states must be used for 100 MHz operation when using Page Mode DRAM.
However, by using the information in the appropriate table, a designer may choose to evaluate whether
fewer wait states might be used by determining which timing prevents operation at 100 MHz, running the
chip at a slightly lower frequency (e.g., 95 MHz), using faster DRAM (if it becomes available), and control
factors such as capacitive and resistive load to improve overall system performance.
Figure 3-11 DRAM Page Mode Wait States Selection Guide
Chip Frequency
(MHz)
DRAM Type
(tRAC ns)
100
80
70
60
40
66
80
100
1 Wait States
2 Wait States
3 Wait States
4 Wait States
Notes This figure should be use for primary selection. For
exact and detailed timings see the following tables.
AA0472
50
120
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