
DS87C530/DS83C530
070898 17/41
either HIP (High Interrupt Priority; STATUS.6) or LIP
(Low Interrupt Priority; STATUS.5) is high, then the cor-
responding level is in service.
Software should not rely on a lower priority level inter-
rupt source to remove PMM (Switchback) when a
higher level is in service. Check the current priority ser-
vice level before entering PMM. If the current service
level locks out a desired Switchback source, then it
would be advisable to wait until this condition clears
before entering PMM.
Alternately, software can prevent an undesired exit from
PMM by entering a low priority interrupt service level
before entering PMM. This will prevent other low priority
interrupts from causing a Switchback.
Status also contains information about the state of the
serial ports. Serial Port Zero Receive Activity (SPRA0;
STATUS.0) indicates a serial word is being received on
Serial Port 0 when this bit is set to a 1. Serial Port Zero
Transmit Activity (SPTA0; STATUS.1) indicates that the
serial port is still shifting out a serial transmission. STA-
TUS.2 and STATUS.3 provide the same information for
Serial Port 1, respectively. These bits should be
interrogated before entering PMM1 or PMM2 to ensure
that no serial port operations are in progress. Changing
the clock divisor rate during a serial transmission or
reception will corrupt the operation.
Crystal/Ring Operation
The DS87C530/DS83C530 allows software to choose
the clock source as an independent selection from the
instruction cycle rate. The user can select crystal–
based or ring oscillator–based operation under soft-
ware control. Power–on reset default is the crystal (or
external clock) source. The ring may save power
depending on the actual crystal speed. To save still
more power, software can then disable the crystal
amplifier. This process requires two steps. Reversing
the process also requires two steps.
The XT/RG bit (EXIF.3) selects the crystal or ring as the
clock source. Setting XT/RG = 1 selects the crystal. Set-
ting XT/RG = 0 selects the ring. The RGMD (EXIF.2) bit
serves as a status bit by indicating the active clock
source. RGMD = 0 indicates the CPU is running from
the crystal. RGMD = 1 indicates it is running from the
ring. When operating from the ring, disable the crystal
amplifier by setting the XTOFF bit (PMR.3) to a 1. This
can only be done when XT/RG = 0.
When changing the clock source, the selection will take
effect after a one instruction cycle delay. This applies to
changes from crystal to ring and vise versa. However,
this assumes that the crystal amplifier is running. In
most cases, when the ring is active, software previously
disabled the crystal to save power. If ring operation is
being used and the system must switch to crystal opera-
tion, the crystal must first be enabled. Set the XTOFF bit
to a 0. At this time, the crystal oscillation will begin. The
DS87C530/DS83C530 then provides a warm–up delay
to make certain that the frequency is stable. Hardware
will set the XTUP bit (STATUS.4) to a 1 when the crystal
is ready for use. Then software should write XT/RG to a
1 to begin operating from the crystal. Hardware pre-
vents writing XT/RG to a 1 before XTUP = 1. The delay
between XTOFF = 0 and XTUP = 1 will be 65,536 crystal
clocks in addition to the crystal cycle startup time.
Switchback has no effect on the clock source. If soft-
ware selects a reduced clock divider and enables the
ring, a Switchback will only restore the divider speed.
The ring will remain as the time base until altered by soft-
ware. If there is serial activity, Switchback usually
occurs with enough time to create proper baud rates.
This is not true if the crystal is off and the CPU is running
from the ring. If sending a serial character that wakes
the system from crystaless PMM, then it should be a
dummy character of no importance with a subsequent
delay for crystal startup.
The following table is a summary of the bits relating to
PMM and its operation. The flow chart below illustrates
a typical decision set associated with PMM.