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參數(shù)資料
| 型號： | DS87C530 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | EPROM/ROM Micro with Real Time Clock(帶實時時鐘的EPROM/ROM高速微控制器) |
| 中文描述： | EPROM微控制器，帶有實時時鐘 |
| 文件頁數(shù)： | 12/41頁 |
| 文件大?。?/td> | 437K |
| 代理商： | DS87C530 |
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DS87C530/DS83C530
070898 12/41
MEMORY RESOURCES
Like the 8051, the DS87C530/DS83C530 uses three
memory areas. The total memory configuration of the
device is 16KB of ROM, 1KB of data SRAM and 256
bytes of scratchpad or direct RAM. The 1KB of data
space SRAM is read/write accessible and is memory
mapped. This on–chip SRAM is reached by the MOVX
instruction. It is not used for executable memory. The
scratchpad area is 256 bytes of register mapped RAM
and is identical to the RAM found on the 80C52. There is
no conflict or overlap among the 256 bytes and the 1KB
as they use different addressing modes and separate
instructions.
OPERATIONAL CONSIDERATION
The erasure window of the windowed CERQUAD
should be covered without regard to the programmed/
unprogrammed state of the EPROM. Otherwise, the
device may not meet the AC and DC parameters listed
in the datasheet.
PROGRAM MEMORY ACCESS
On–chip ROM begins at address 0000h and is contigu-
ous through 3FFFh (16KB). Exceeding the maximum
address
of
on–chip
DS87C530/DS83C530 to access off–chip memory.
However, the maximum on–chip decoded address is
selectable by software using the ROMSIZE feature.
Software can cause the microcontroller to behave like a
device with less on–chip memory. This is beneficial
when overlapping external memory, such as Flash, is
used.
ROM
will
cause
the
The maximum memory size is dynamically variable.
Thus a portion of memory can be removed from the
memory map to access off–chip memory, then restored
to access on–chip memory. In fact, all of the on–chip
memory can be removed from the memory map allow-
ing the full 64KB memory space to be addressed from
off–chip memory. ROM addresses that are larger than
the selected maximum are automatically fetched from
outside the part via Ports 0 and 2. A depiction of the
ROM memory map is shown in Figure 4.
The ROMSIZE register is used to select the maximum
on–chip decoded address for ROM. Bits RMS2, RMS1,
RMS0 have the following affect:
RMS2
0
0
0
0
1
1
1
1
RMS1
0
0
1
1
0
0
1
1
RMS0
0
1
0
1
0
1
0
1
Maximum on–chip
ROM Address
0KB
1KB
2KB
4KB
8KB
16KB (default)
Invalid – reserved
Invalid – reserved
The reset default condition is a maximum on–chip ROM
address of 16KB. Thus no action is required if this fea-
ture is not used. When accessing external program
memory, the first 16KB would be inaccessible. To select
a smaller effective ROM size, software must alter bits
RMS2–RMS0. Altering these bits requires a Timed
Access procedure as explained below.
Care should be taken so that changing the ROMSIZE
register does not corrupt program execution. For exam-
ple, assume that a device is executing instructions from
internal program memory near the 12KB boundary
(~3000h) and that the ROMSIZE register is currently
configured for a 16KB internal program space. If soft-
ware reconfigures the ROMSIZE register to 4KB
(0000h–0FFFh) in the current state, the device will
immediately jump to external program execution
because program code from 4KB to 16KB
(1000h–3FFFh) is no longer located on–chip. This
could result in code misalignment and execution of an
invalid instruction. The recommended method is to
modify the ROMSIZE register from a location in memory
that will be internal (or external) both before and after the
operation. In the above example, the instruction which
modifies the ROMSIZE register should be located
below the 4KB (1000h) boundary, so that it will be unaf-
fected by the memory modification. The same precau-
tion should be applied if the internal program memory
size is modified while executing from external program
memory.
Off–chip memory is accessed using the multiplexed
address/data bus on P0 and the MSB address on P2.
While serving as a memory bus, these pins are not I/O
ports. This convention follows the standard 8051
method of expanding on–chip memory. Off–chip ROM
access also occurs if the EA pin is a logic 0. EA over-
rides all bit settings. The PSEN signal will go active (low)
to serve as a chip enable or output enable when Ports 0
and 2 fetch from external ROM.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS87C530_05 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM/ROM Microcontrollers with Real-Time Clock |
| DS87C530_1 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM/ROM Micro with Real Time Clock |
| DS87C530+ECL | 制造商:Maxim Integrated Products 功能描述:MICRO OTP RTC 33MHZ 52P TQFP PB-FRR - Trays |
| DS87C530-ECL | 功能描述:8位微控制器 -MCU EPROM MCU w/RTC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| DS87C530-ECL+ | 功能描述:8位微控制器 -MCU EPROM MCU w/RTC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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