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參數(shù)資料
| 型號： | DS87C530 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | EPROM/ROM Micro with Real Time Clock(帶實時時鐘的EPROM/ROM高速微控制器) |
| 中文描述： | EPROM微控制器，帶有實時時鐘 |
| 文件頁數(shù)： | 13/41頁 |
| 文件大?。?/td> | 437K |
| 代理商： | DS87C530 |
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DS87C530/DS83C530
070898 13/41
ROM MEMORY MAP
Figure 4
ON CHIP
OFF CHIP
OFF CHIP
EA=1
EA=0
64K
16K
64K
FFFFh
0000h
FFFFh
0000h
3FFFh
DEFAULT = 16K BYTES
ROM SIZE IGNORED
USER
SELECTABLE
DATA MEMORY ACCESS
Unlike
many
DS87C530/DS83C530 contains on–chip data memory.
It also contains the standard 256 bytes of RAM
accessed by direct instructions. These areas are sepa-
rate. The MOVX instruction accesses the on–chip data
memory. Although physically on–chip, software treats
this area as though it was located off–chip. The 1KB of
SRAM is between address 0000h and 03FFh.
8051
derivatives,
the
Access to the on–chip data RAM is optional under soft-
ware control. When enabled by software, the data
SRAM is between 0000h and 03FFh. Any MOVX
instruction that uses this area will go to the on–chip RAM
while enabled. MOVX addresses greater than 03FFh
automatically go to external memory through Ports 0
and 2.
When disabled, the 1KB memory area is transparent to
the system memory map. Any MOVX directed to the
space between 0000h and FFFFh goes to the expanded
bus on Ports 0 and 2. This also is the default condition.
This default allows the DS87C530/DS83C530 to drop
into an existing system that uses these addresses for
other hardware and still have full compatibility.
The on–chip data area is software selectable using two
bits in the Power Management Register at location C4h.
This selection is dynamically programmable. Thus
access to the on–chip area becomes transparent to
reach off–chip devices at the same addresses. The con-
trol bits are DME1 (PMR.1) and DME0 (PMR.0). They
have the following operation:
DATA MEMORY ACCESS CONTROL
Table 3
DME1
DME0
DATA MEMORY ADDRESS
MEMORY FUNCTION
0
0
0000h – FFFFh
External Data Memory *Default condition
0
1
0000h – 03FFh
0400h – FFFFh
Internal SRAM Data Memory
External Data Memory
1
0
Reserved
Reserved
1
1
0000h – 03FFh
0400h – FFFBh
FFFCh
FFFDh–FFFh
Internal SRAM Data Memory
Reserved – no external access
Read access to the status of lock bits
Reserved – no external access
Notes on the status byte read at FFFCh with DME1, 0 = 1, 1: Bits 2–0 reflect the programmed status of the security lock
bits LB2–LB0. They are individually set to a logic 1 to correspond to a security lock bit that has been programmed.
These status bits allow software to verify that the part has been locked before running if desired. The bits are read only.
Note: After internal MOVX SRAM has been initialized, changing bits DEM0/1 will have no affect on the contents of the
SRAM.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS87C530_05 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM/ROM Microcontrollers with Real-Time Clock |
| DS87C530_1 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM/ROM Micro with Real Time Clock |
| DS87C530+ECL | 制造商:Maxim Integrated Products 功能描述:MICRO OTP RTC 33MHZ 52P TQFP PB-FRR - Trays |
| DS87C530-ECL | 功能描述:8位微控制器 -MCU EPROM MCU w/RTC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| DS87C530-ECL+ | 功能描述:8位微控制器 -MCU EPROM MCU w/RTC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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