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參數(shù)資料
| 型號： | DS3134 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PBGA256 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 44/203頁 |
| 文件大小： | 777K |
| 代理商： | DS3134 |
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DS3134
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The DMA also checks the Transmit Done Queue Host Read Pointer to make sure that an overflow does
not occur. If this does occur, then the DMA will set the Status Bit for Transmit DMA Done Queue Write
Error (TDQWE) in the Status Register for DMA (SDMA) and it will not write to the Done Queue nor will
it increment the Write Pointer. In such a scenario, information on transmitted packets will be lost and
unrecoverable. Each of the status bits can also (if enabled) cause a hardware interrupt to occur. See
Section 4 for more details.
Done Queue Burst Writing
The DMA has the ability to write to the Done Queue in bursts. This allows for a more efficient use of the
PCI Bus. The DMA can hand off descriptors to the Done Queue in-groups rather than one at a time,
freeing up the PCI Bus for more time critical functions.
Internal to the device there is a FIFO that can store up to 8 Done Queue Descriptors (8 dwords since each
descriptor occupies one dword). The Host must configure the FIFO for proper operation via the Transmit
DMA Queues Control (TDMAQ) register (see below).
When enabled via the Transmit Done Queue FIFO Enable (TDQFE) bit, the Done Queue FIFO will not
write to the Done Queue until it reaches the High Water Mark. When the Done Queue FIFO reaches the
High Water Mark (which is six descriptors), it will attempt to empty the Done Queue FIFO by burst
writing to the Done Queue. Before it writes to the Done Queue, it checks (by examining the Transmit
Done Queue Host Read Pointer) to make sure that the Done Queue has enough room to empty the Done
Queue FIFO. If the Done Queue does not have enough room, then it will only burst write enough
descriptors to keep from overflowing the Done Queue. If the FIFO detects that there is no room for any
descriptors to be written, then it will set the Status Bit for Transmit DMA Done Queue Write Error
(TDQWE) in the Status Register for DMA (SDMA) and it will not write to the Done Queue nor will it
increment the Write Pointer. In such a scenario, information on transmitted packets will be lost and
unrecoverable. If the Done Queue FIFO can write descriptors to the Done Queue, then it will burst write
them, increment the write pointer, and set the Status Bit for Transmit DMA Done Queue Write (TDQW)
in the Status Register for DMA (SDMA). See Section 4 for more details on Status bits.
Done Queue FIFO Flush Timer
To make sure that the Done Queue FIFO does get flushed to the Done Queue on a regular basis, the
Transmit Done Queue FIFO Flush Timer (TDQFFT) is used by the DMA to determine the maximum wait
time in between writes. The TDQFFT is a 16-bit programmable counter that is decremented every PCLK
divided by 256. It is only monitored by the DMA when the Transmit Done Queue FIFO is enabled
(TDQFE = 1). For a 33 MHz PCLK, the timer is decremented every 7.76 us and for a 25 MHz clock it is
decremented every 10.24 us. Each time the DMA writes to the Done Queue it resets the timer to the
count placed into it by the Host. On initialization, the Host will set a value into the TDQFFT that
indicates the maximum time the DMA should wait in between writes to the Done Queue. For example,
with a PCLK of 33 MHz, the range of wait times are from 7.8 us (RDQFFT = 0001h) to 508 ms
(RDQFFT = FFFFh) and PCLK of 25 MHz, the wait times range from 10.2 us (RDQFFT = 0001h) to
671 ms (RDQFFT = FFFFh).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS3150QN | DATACOM, PCM TRANSCEIVER, PQCC28 |
| DS3150Q | DATACOM, PCM TRANSCEIVER, PQCC28 |
| DS3150TN | DATACOM, PCM TRANSCEIVER, PDIP48 |
| DS3150T | DATACOM, PCM TRANSCEIVER, PQFP48 |
| DS5000FP-12 | 8-BIT, 12 MHz, MICROCONTROLLER, PQFP80 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS-313PIN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Miscellaneous |
| DS-313-PIN | 功能描述:信號調(diào)節(jié) RoHS:否 制造商:EPCOS 產(chǎn)品:Duplexers 頻率:782 MHz, 751 MHz 頻率范圍: 電壓額定值: 帶寬: 阻抗:50 Ohms 端接類型:SMD/SMT 封裝 / 箱體:2.5 mm x 2 mm 工作溫度范圍:- 30 C to + 85 C 封裝:Reel |
| DS31400 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter |
| DS31400DK | 功能描述:時鐘和定時器開發(fā)工具 DS31400 Dev Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| DS31400GN | 功能描述:計時器和支持產(chǎn)品 Not Available From Mouser RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
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