- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11582 > DS3112+ (Maxim Integrated Products)IC MUX TEMPE T3/E3 256-BGA PDF資料下載
參數(shù)資料
| 型號： | DS3112+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 130/133頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX TEMPE T3/E3 256-BGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 控制器類型： | 調(diào)幀器，多路復(fù)用器 |
| 接口： | 并行/串行 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 電流 - 電源： | 150mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-LBGA |
| 供應(yīng)商設(shè)備封裝： | 256-PBGA（27x27） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1419 (CN2011-ZH PDF) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁當(dāng)前第130頁第131頁第132頁第133頁
DS3112
96 of 133
10 FEAC CONTROLLER
The DS3112 contains an onboard FEAC controller. When the device is operated in the T3 mode, the
FEAC controller is only active in the C-Bit Parity Mode. When the device is operated in the E3 mode, the
user has the option to connect the FEAC controller to the Sn bit position. On the receive side, the FEAC
controller is always connected to the receive E3 framer. If the host does not wish to use the FEAC
controller for the Sn bit, then the status updates provided by the FEAC controller are ignored. On the
transmit side, the host selects the source of the Sn via the E3SnC0 and E3SnC1 controls bits in the T3/E3
Control Register (Section 5.2).
The DS3112 can both detect and generate Far End Alarm Codewords (FEAC). The FEAC codeword is a
repeating 16 bit pattern of the form ...0xxxxxx011111111... where the rightmost bit is transmitted first.
The FEAC codeword must be transmitted at least 10 times. When no FEAC codeword is being
transmitted, the data pattern should be forced to all ones.
The receive FEAC detector does a bit by bit search for a data pattern of the form of a FEAC codeword.
Once found, the receive FEAC detector validates incoming codewords by checking to see that the same
codeword is found in three consecutive opportunities. Once validated, a codeword is considered no longer
present when it is received incorrectly twice in a row. Once a codeword is validated, the Receive FEAC
Codeword Detect (RFCD) status bit is set and the codeword is written into the Receive FEAC FIFO for
the host to read. The host can use the RFCD status to know when to read the Receive FEAC FIFO. The
Receive FEAC FIFO is four codewords deep. If the FIFO is full when the receive FEAC detector
attempts to write a new incoming codeword, the latest incoming codeword(s) will be discarded and the
Receive FEAC FIFO Overflow (RFFO) status bit will be set.
90h
The DS3112 can transmit two different FEAC codewords. This is useful if the host wishes to generate a
Loopback Command which is made up of 10 FEAC codewords that indicate the type of loopback
followed by 10 FEAC codewords that indicate which line is to be looped back.
10.1 FEAC Control Register Description
Register Name:
FCR
Register Description:
FEAC Control Register
Register Address:
Bit #
7
6
5
4
3
2
1
0
Name
TFS1
TFS0
TFCA5
TFCA4
TFCA3
TFCA2
TFCA1
TFCA0
Default
0
Bit #
15
14
13
12
11
10
9
8
Name
RFR
IERFI
TFCB5
TFCB4
TFCB3
TFCB2
TFCB1
TFCB0
Default
0
—
0
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 5: Transmit FEAC Codeword A Data (TFCA0 to TFCA5). The FEAC codeword is of the form
...0xxxxxx011111111... where the rightmost bit is transmitted first. These six bits are the middle six bits of the
second byte of the FEAC codeword (i.e., the six “x” bits). The device can generate two different codewords and
these six bits represent what will be transmitted for codeword A. TFCA0 is the LSB and is transmitted first while
TFCA5 is the MSB and is transmitted last. The TFS0 and TFS1 control bits determine if this codeword is to be
generated. These bits should only be changed when the transmit FEAC controller is in the idle state (TFS0 = 0 and
TFS1 = 0).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PIC16F1847-E/P | MCU 14KB FLASH 1KB RAM 18PDIP |
| DS21Q43AT+ | IC FRAMER E1 QUAD 5V IND 128TQFP |
| PIC16LF1847-E/P | MCU 14KB FLASH 1KB RAM 18PDIP |
| DS21Q43AT | IC FRAMER E1 QUAD 5V IND 128TQFP |
| DS2143Q | IC CONTROLLER E1 5V LP 44-PLCC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3112+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112+W | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112D1 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112D1+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112DK | 功能描述:網(wǎng)絡(luò)開發(fā)工具 DS3112 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。