參數(shù)資料
型號(hào): DS26303L-75
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 數(shù)字傳輸電路
英文描述: 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
中文描述: DATACOM, PCM TRANSCEIVER, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, MS-026, LQFP-144
文件頁(yè)數(shù): 23/97頁(yè)
文件大?。?/td> 966K
代理商: DS26303L-75
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
23 of 97
Figure 4-5. Serial Port Operation for Read Access with CLKE = 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
0
A1
A2
A3
A4
A5
D1
D2
D3
D4
D5
D6
SCLK
SDI
SDO
CSB
(lsb)
(msb)
D0
(lsb)
D7
(msb)
A6
X
4.1.3 Parallel Port Operation
When using the parallel interface on the DS26303 the user has the option for either multiplexed bus operation or
nonmultiplexed bus operation. The ALE pin is pulled high in nonmultiplexed bus operation. The DS26303 can
operate with either Intel or Motorola bus-timing configurations selected by MOTEL pin. This pin being high selects
the Intel mode. The parallel port is only operational if MODESEL pin is pulled high. The following table lists all the
pins and their functions in the parallel port mode. See the timing diagrams in Section
10
for more details.
Table 4-3. Parallel Port Mode Selection and Pin Functions
MODESEL, MOTEL,
MUX
100
110
101
111
PARALLEL HOST
INTERFACE
Nonmultiplexed Motorola
Nonmultiplexed Intel
Multiplexed Motorola
Multiplexed Intel
ADDRESS, DATA, AND CONTROL
CSB, ACKB, DSB, RWB, ASB, A [4:0], D [7:0],
INTB
CSB, RDY, WRB, RDB, ALE, A [4:0], D [7:0],
INTB
CSB, ACKB, DSB, RWB, ASB, AD [7:0],
INTB
CSB, RDY, WRB, RDB, ALE, AD [7:0],
INTB
4.1.4 Interrupt Handling
There are four sets of events that can potentially trigger an interrupt. The interrupt functions as follows:
When status changes on an interruptible event, the
INTB
pin will go low if the event is enabled through the
corresponding interrupt-enable register.
INTB
must be pulled high externally with a 10k resistor for wired-OR
operation. If a wired-OR operation is not required, the
INTB
pin can be configured to be high when not active
by setting register
GISC.INTM
.
When an interrupt occurs, the host processor must read the interrupt status register to determine the source of
the interrupt. The read also clears the Interrupt Status register and clears the output
INTB
pin. The interrupt
status register can also be configured as clear-on-write as per register
GISC.CWE
. This clears
INTB
when a
clear-on-write is performed.
Subsequently, the host processor can read the corresponding status register to check the real-time status of
the event.
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DS26303L-75+A3 功能描述:電信線路管理 IC 3.3V E1/T1/J1 Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
DS26303L-75A3 功能描述:電信線路管理 IC 3.3V E1/T1/J1 Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
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