參數資料
型號: DM9000
廠商: Electronic Theatre Controls, Inc.
英文描述: ISA TO ETHERNET MAC CONTROLLER WITH INTEGRATED 10/100 PHY
中文描述: ISA以以太網MAC控制器,它集成10/100網卡芯片
文件頁數: 52/54頁
文件大?。?/td> 575K
代理商: DM9000
DM9000
ISA to Ethernet MAC Controller with Integrated 10/100 PHY
52
Final
Version: DM9000-DS-F02
June 26, 2002
13. APPENDIX:
1. Data Sheet Changed Errata List
Items
1
2
3
4
5
6
Data & Ver.
05/02/2001 P01
06/14/2001 P01
06/22/2001 P01
12/05/2001 P02
12/05/2001 P02
12/05/2001 P02
Page
Content
DM9000 Data Sheet Start
Modify Block Diagram
Check TableA-1-A &A-1-B
Check TableA-2-A &A-2-B
Check TableA-3-A &A-2-B
Check TableA-4-A &A-4-B
Page 1
Page 14
Page 7
Page 11
Page 38
Before Modification
4
BKPM
0,RW
Back pressure mode. This mode is for half duplex mode only. Generate a jam
pattern when a packet’s DA match and RX SRAM over BPHW
Back pressure mode. This mode is for half duplex mode only. Generate a jam
pattern when any packet coming and RX SRAM over BPHW
3
BKPA
0,RW
Table A-1-A
After Modification
4
BKPA
0,RW
Back pressure mode. This mode is for half duplex mode only. Generate a jam
pattern when any packet coming and RX SRAM over BPHW
Back pressure mode. This mode is for half duplex mode only. Generate a jam
pattern when a packet’s DA match and RX SRAM over BPHW
3
BKPM
0,RW
Table A-1-B
Before Modification
16,17,18,
19
TEST1~TEST4
I
Operation Mode
Test1,2,3,4=(1,1,0,0) : the processor interface is ISA compatible
Test1,2,3,4=(1,1,0,1) : the processor interface is for general processor
Table A-2-A
After Modification
16,17,18,
19
TEST1~TEST4
I
Operation Mode
Test1,2,3,4=(1,1,0,0) in normal application
Table A-2-B
Before Modification
Bit
2:1
Name
LBK
Default
00,RW
Description
Loopback mode
Bit 2 1
0 0 normal
0 1 MAC internal loopback
1 0 internal PHY digital loopback
1 1 internal PHY analog loopback
Table A-3-A
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