參數(shù)資料
型號: D950-CORE
廠商: 意法半導(dǎo)體
元件分類: 數(shù)字信號處理
英文描述: 16-Bit Fixed Point Digital Signal Processor DSP Core
中文描述: 16位定點數(shù)字信號處理器DSP核
文件頁數(shù): 5/89頁
文件大小: 560K
代理商: D950-CORE
5/89
D950-Core
1
Introduction
The D950-Core is a general purpose programmable 16-bit fixed point Digital Signal Processor
Core, designed for multimedia, telecom and datacom applications. The D950-Core is a core
product, used in combination with standard or custom peripherals from the standard cell
library. The peripherals are implemented around the core on the same silicon die, for
application specific DSP silicon chip design.
The main blocks of the D950-Core include an arithmetic data calculation unit, a program
control unit and an address calculation unit, able to manage up to 64k (program) and 128k
(data) x 16-bit memory spaces. Standard peripherals from the macrocell library include an
Emulation Unit, a Bus Switch Unit, an Interrupt Controller, a DMA Controller, a Timer and a
Synchronous Serial Port. Memory can be added for programs or data and dedicated memory
cells can be generated by use of RAM and ROM memory generators. The development of
application specific peripherals is simplified by using the standard cells library.
A set of high level hardware and software development tools and a complete design package,
give the user a substantial advantages in the form of a performant design environment, rapid
prototyping, first time silicon success and built-in test strategies for a global solution in AS-DSP
development:
Figure 1.1 shows an architecture example for an AS-DSP used for audio decoding (Dolby
AC3, MPEG).
Figure 1.1
AS-DSP Architecture Example
DATA
MEMORY
PROGRAM
MEMORY
PERIPHERAL A
PERIPHERAL D
PERIPHERAL B
PERIPHERAL C
CHANNEL 0
CHANNEL 1
CHANNEL 2
CHANNEL 3
DMA CONTROLLER
I
N
T
E
R
R
U
P
T
C
O
N
T
R
O
L
L
E
R
BUS
SWITCH
UNIT
D950-CORE
ON-CHIP MEMORY
ON-CHIP MEMORY
ON-CHIP MEMORY
X-BUS
I-BUS
Y-BUS
AS-DSP
TAP
VR02015
EMU
2
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