參數(shù)資料
型號(hào)： CYD36S18V18
廠商： Cypress Semiconductor Corp.
英文描述： FullFlex Synchronous SDR Dual-Port SRAM(FullFlex同步SDR雙端口SRAM)
中文描述： FullFlex器件特別提款權(quán)同步雙端口SRAM（FullFlex器件同步雙端口SRAM的特別提款權(quán)）
文件頁數(shù)： 12/52頁
文件大?。?/td> 774K
代理商： CYD36S18V18
FullFlex
Document #: 38-06082 Rev. *F
Page 12 of 52
configuration, a mask register value of 003FC divides the
mask register into three regions. With bit 0 being the least
significant bit and bit 17 being the most significant bit, the two
least significant bits are masked, the next eight bits are
unmasked, and the remaining bits are masked.
The
mirror register
is used to reload the counter register on
retransmit operations (see “retransmit” below) and wrap
functions (see “counter increment” below). The last value
loaded into the counter register is stored in the mirror register.
The mirror register is only changed by master reset (MRST),
Counter Reset, and Counter Load.
Table 8
summarizes the operations of these registers and the
required input control signals. All signals except MRST are
synchronized to the ports clock.
Counter Load Operation
[1]
The address counter and mirror registers are both loaded with
the address value presented on the address lines. This value
ranges from 0 to 1FFFFF.
Mask Load Operation
[1]
The mask register is loaded with the address value presented
on the address bus. This value ranges from 0 to 1FFFFF
though not all values permit correct increment operations.
Permitted values are in the form of 2
n
–1, 2
n
–2, or 2
n
–4. The
counter register can only be segmented in up to three regions.
From the most significant bit to the least significant bit,
permitted values have zero or more “0s”, one or more “1s”, and
the least significant two bits can be “11”, “10”, or “00”. Thus
1FFFFE, 07FFFF, and 003FFC are permitted values but
02FFFF, 003FFA, and 07FFE4 are not.
Counter Readback Operation
The internal value of the counter register can be read out on
the address lines. The address will be valid t
CA
after the
selected number of latency cycles configured by FTSEL. The
data bus (DQ) is tri-stated on the cycle that the address is
presented on the address lines.
Figure 3
shows a block
diagram of this logic.
Mask Readback Operation
The internal value of the mask register can be read out on the
address lines. The address will be valid t
CA
after the selected
number of latency cycles configured by FTSEL. The data bus
(DQ) is tri-stated on the cycle that the address is presented on
the address lines.
Figure 3
shows a block diagram of the
operation.
Counter Reset Operation
All unmasked bits of the counter and mirror registers are reset
to “0”. All masked bits remain unchanged. A mask reset
followed by a counter reset will reset the counter and mirror
registers to 00000.
Mask Reset Operation
The mask register is reset to all “1s”, which unmasks every bit
of the burst counter.
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CYD36S18V18-133BBXC 制造商:Cypress Semiconductor 功能描述:FULLFLEX36 36M SYNC DUAL-PORT ?2M X 18, SDR? - Bulk
CYD36S18V18-167BGXC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18MB (2Mx18) 1.8v 167MHz Sync 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CYD36S18V18-167BGXI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 36MB (2Mx18) 1.8v 167MHz Sync 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CYD36S18V18-200BGXC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 36MB (2Mx18) 1.8v 200MHz Sync 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CYD36S36V18-133BBXC 功能描述:IC SRAM 36MBIT 133MHZ 256LFBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2
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