參數(shù)資料
型號(hào)： CY7C43646AV
廠商： Cypress Semiconductor Corp.
英文描述： 3.3V 1K 4K 16K x 36 x 18 x 2 Tri Bus FIFO
中文描述： 3.3每1000 4K的16K的× 36 × 18 × 2三總線先進(jìn)先出
文件頁(yè)數(shù)： 13/40頁(yè)
文件大小： 644K
代理商： CY7C43646AV
CY7C43646AV
CY7C43666AV
CY7C43686AV
Document #: 38-06026 Rev. *C
Page 13 of 40
Table 1. Flag Programming
Table 3. Port B Enable Function
SPM
H
H
H
H
H
H
H
L
L
L
L
FS1/SEN
H
H
H
H
L
L
L
H
H
L
L
FS0/SD
H
H
L
L
H
H
L
L
H
H
L
MRS1
↑
X
↑
X
↑
X
↑
↑
↑
↑
↑
MRS2
X
↑
X
↑
X
↑
↑
↑
↑
↑
↑
X1 and Y1 Registers
[1]
64
X
16
X
8
X
Parallel programming via Port A
Serial programming via SD
Reserved
Reserved
Reserved
X2 and Y2 Registers
[2]
X
64
X
16
X
8
Parallel programming via Port A
Serial programming via SD
Reserved
Reserved
Reserved
Table 2. Port A Enable Function
CSA
H
L
L
L
L
L
L
L
W/RA
X
H
H
H
L
L
L
L
ENA
X
L
H
H
L
H
L
H
MBA
X
X
L
H
L
L
H
H
CLKA
X
X
↑
↑
X
↑
X
↑
A
0
–
35
Port Function
None
None
FIFO1 Write
Mail1 Write
None
FIFO2 Read
None
In high-impedance state
In high-impedance state
In high-impedance state
In high-impedance state
Active, FIFO2 output register
Active, FIFO2 output register
Active, Mail2 register
Active, Mail2 register
Mail2 Read (set MBF2 HIGH)
CSB
H
L
L
L
L
RENB
X
H
H
H
H
MBB
X
L
L
H
H
CLKB
X
X
↑
X
↑
B
0
–
17
Port Function
None
None
FIFO1 Read
None
In high-impedance state
Active, FIFO1 output register
Active, FIFO1 output register
Active, Mail1 register
Active, Mail1 register
Mail1 Read (set MBF1 HIGH)
Table 4. Port C Enable Function
WENC
H
H
L
L
MBC
L
H
L
H
CLKC
↑
↑
X
X
C
0
–
17
Port Function
FIFO2 Write
Mail2 Write
None
None
In high-impedance state
In high-impedance state
In high-impedance state
Active, Mail1 register
Notes:
1.
2.
X1 register holds the offset for AEB; Y1 register holds the offset for AFA.
X2 register holds the offset for AEA; Y2 register holds the offset for AFC.
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