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參數(shù)資料
| 型號： | CY7C43644AV |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 3.3V 1Kx36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(3.3V 1K x36 x2 雙向同步先進(jìn)先出帶總線匹配) |
| 中文描述： | 3.3 1Kx36 x2雙向同步FIFO瓦特/總線匹配（3.3每1000 x36 x2雙向同步先進(jìn)先出帶總線匹配） |
| 文件頁數(shù)： | 6/38頁 |
| 文件大?。?/td> | 581K |
| 代理商： | CY7C43644AV |
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CY7C43644AV
CY7C43664AV/CY7C43684AV
6
PRELIMINARY
Maximum Ratings
[1]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ...................................
–
65
°
C to +150
°
C
Ambient Temperature with
Power Applied...............................................
–
55
°
C to +125
°
C
Supply Voltage to Ground Potential...............
–
0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State
[2]
......................................
–
0.5V to V
CC
+0.5V
DC Input Voltage
[2]
...................................
–
0.5V to V
CC
+0.5V
Output Current into Outputs (LOW) .............................20 mA
Static Discharge Voltage ...........................................>2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current..................................................... >200 mA
SPM
Serial
Programming
Port A Write/
Read Select
I
A LOW on this pin selects serial programming of partial flag offsets. A HIGH on this pin
selects parallel programming or default offsets (8, 16, or 64).
A HIGH selects a write operation and a LOW selects a read operation on Port A for a
LOW-to-HIGH transition of CLKA. The A
0
–
35
outputs are in the high-impedance state
when W/RA is HIGH.
A LOW selects a write operation and a HIGH selects a read operation on Port B for a
LOW-to-HIGH transition of CLKB. The B
0
–
35
outputs are in the high-impedance state
when W/RB is LOW.
W/RA
I
W/RB
Port B Write/
Read Select
I
Pin Definitions
(continued)
Signal Name
Description
I/O
Function
Operating Range
Range
Ambient
Temperature
V
CC
[3]
Commercial
0
°
C to +70
°
C
3.3V ± 10%
Industrial
–
40
°
C to +85
°
C
3.3V ± 10%
Electrical Characteristics
Over the Operating Range
Parameter
Description
Test Conditions
CY7C43644/64/84AV
Min.
Unit
Max.
V
OH
Output HIGH Voltage
V
CC
= 3.0V,
I
OH
=
–
2.0 mA
V
CC
= 3.0V,
I
OL
= 8.0 mA
2.4
V
V
OL
Output LOW Voltage
0.5
V
V
IH
V
IL
I
IX
I
OZL
I
OZH
I
CC1[4]
Input HIGH Voltage
2.0
V
CC
0.8
V
Input LOW Voltage
–
0.5
V
μ
A
μ
A
Input Leakage Current
V
CC
= Max.
V
SS
< V
O
< V
CC
–
10
+10
Output OFF, High Z
Current
–
10
+10
Active Power Supply
Current
Com
’
l
60
mA
Ind
60
mA
I
SB[5]
Average Standby
Current
Com
’
l
12
mA
Ind
12
mA
Capacitance
[6]
Parameter
Description
Test Conditions
T
A
= 25
°
C, f = 1 MHz,
V
CC
= 3.3V
Max.
4
8
Unit
pF
pF
C
IN
C
OUT
Notes:
1.
Input Capacitance
Output Capacitance
Stresses beyond those listed under
“
Absolute Maximum Ratings
”
may cause permanent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions beyond those indicated under
“
recommended operating conditions
”
is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded provided the input and output current ratings are observed.
Operating V
Range for -7 speed is 3.3V ± 5%.
Input signals switch from 0V to 3V with a rise/fall time of less than 3 ns, clocks and clock enables switch at 20 MHz, while data inputs switch at 10 MHz. Outputs
are unloaded.
All inputs = V
–
0.2V, except RCLK and WCLK (which are at frequency = 0 MHz). All outputs are unloaded.
Tested initially and after any design or process changes that may affect these parameters.
2.
3.
4.
5.
6.
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