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參數(shù)資料
| 型號(hào)： | CY7C1475V25 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結(jié)構(gòu)的72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM) |
| 中文描述： | 72兆位（2米x 36/4M x 18/1M × 72）流體系結(jié)構(gòu)，通過(guò)與總線延遲（帶總線延遲結(jié)構(gòu)的72兆位通過(guò)的SRAM（2米x 36/4M x 18/1M × 72）流的SRAM） |
| 文件頁(yè)數(shù)： | 16/32頁(yè) |
| 文件大?。?/td> | 1134K |
| 代理商： | CY7C1475V25 |
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CY7C1471V25
CY7C1473V25
CY7C1475V25
Document #: 38-05287 Rev. *I
Page 16 of 32
TAP AC Switching Characteristics
Over the Operating Range
[10, 11]
Parameter
Clock
t
TCYC
t
TF
t
TH
t
TL
Output Times
t
TDOV
t
TDOX
Setup Times
t
TMSS
t
TDIS
t
CS
Hold Times
t
TMSH
t
TDIH
t
CH
Description
Min
Max
Unit
TCK Clock Cycle Time
TCK Clock Frequency
TCK Clock HIGH Time
TCK Clock LOW Time
50
ns
MHz
ns
ns
20
20
20
TCK Clock LOW to TDO Valid
TCK Clock LOW to TDO Invalid
10
ns
ns
0
TMS Setup to TCK Clock Rise
TDI Setup to TCK Clock Rise
Capture Setup to TCK Rise
5
5
5
ns
ns
ns
TMS Hold after TCK Clock Rise
TDI Hold after Clock Rise
Capture Hold after Clock Rise
5
5
5
ns
ns
ns
Notes
10.t
and t
refer to the setup and hold time requirements of latching data from the boundary scan register.
11.Test conditions are specified using the load in TAP AC Test Conditions. t
R
/t
F
= 1 ns.
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| CY7C1473V25 | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結(jié)構(gòu)的72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM) |
| CY7C1475V33 | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結(jié)構(gòu)的72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM) |
| CY7C1471V33 | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結(jié)構(gòu)的72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1475V33-100AXC | 制造商:Cypress Semiconductor 功能描述:72MB (1MBX72) NOBL FLOW-THRU, 3.3V CORE, 2.5/3.3V I/O - Bulk |
| CY7C1475V33-100BGC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC SGL 3.3V 72MBIT 1MX72 8.5NS 209FBGA - Bulk |
| CY7C1475V33-133BGC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC OCTAL 3.3V 72MBIT 1MX72 6.5NS 209FBGA - Bulk |
| CY7C14802BC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C14802XC | 制造商:Cypress Semiconductor 功能描述: |
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