參數(shù)資料
型號(hào): CY7C1361C-117BGC
廠商: Cypress Semiconductor Corp.
英文描述: 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM
中文描述: 9兆位(256 × 36/512K × 18)流通過(guò)的SRAM
文件頁(yè)數(shù): 15/30頁(yè)
文件大小: 491K
代理商: CY7C1361C-117BGC
PRELIMINARY
CY7C1361C
CY7C1363C
Document #: 38-05541 Rev. *A
Page 15 of 30
3.3V TAP AC Test Conditions
Input pulse levels........ ........................................V
SS
to 3.3V
Input rise and fall times...................... ..............................1ns
Input timing reference levels...........................................1.5V
Output reference levels...................................................1.5V
Test load termination supply voltage...............................1.5V
3.3V TAP AC Output Load Equivalent
2.5V TAP AC Test Conditions
Input pulse levels
......................................... V
SS
to 2.5V
Input rise and fall time .....................................................1 ns
Input timing reference levels.........................................1.25V
Output reference levels ................................................1.25V
Test load termination supply voltage ............................1.25V
2.5V TAP AC Output Load Equivalent
Identification Register Definitions
TDO
1.5V
20pF
Z = 50
50
TDO
1.25V
20pF
Z = 50
50
TAP DC Electrical Characteristics And Operating Conditions
(0°C < TA < +70°C; V
DD
= 3.3V ±0.165V unless
otherwise noted)
[11]
Parameter
V
OH1
Description
Description
Conditions
V
DDQ
= 3.3V
V
DDQ
= 2.5V
V
DDQ
= 3.3V
V
DDQ
= 2.5V
V
DDQ
= 3.3V
V
DDQ
= 2.5V
V
DDQ
= 3.3V
V
DDQ
= 2.5V
V
DDQ
= 3.3V
V
DDQ
= 2.5V
V
DDQ
= 3.3V
V
DDQ
= 2.5V
Min.
2.4
Max.
Unit
V
Output HIGH Voltage
I
OH
= –4.0 mA
I
OH
= –1.0 mA
I
OH
= –100 μA
2.0
V
V
OH2
Output HIGH Voltage
2.9
V
2.1
V
V
OL1
Output LOW Voltage
I
OL
= 8.0 mA
I
OL
= 8.0 mA
I
OL
= 100 μA
0.4
V
0.4
V
V
OL2
Output LOW Voltage
0.2
V
0.2
V
V
IH
Input HIGH Voltage
2.0
V
DD
+ 0.3
V
DD
+ 0.3
0.7
V
1.7
V
V
IL
Input LOW Voltage
–0.5
V
–0.3
0.7
V
I
X
Input Load Current
GND < V
IN
< V
DDQ
–5
5
μA
Instruction Field
CY7C1361C
(256K x36)
000
01011
CY7C1363C
(512K x18)
000
01011
Description
Revision Number (31:29)
Describes the version number.
Reserved for Internal Use
Device Depth (28:24)
[12]
Device Width (23:18)
Cypress Device ID (17:12)
Cypress JEDEC ID Code (11:1)
ID Register Presence Indicator (0)
000001
100110
00000110100
1
000001
010110
00000110100
1
Defines memory type and architecture
Defines width and density
Allows unique identification of SRAM vendor.
Indicates the presence of an ID register.
Note:
11. All voltages referenced to V
SS
(GND) .
12.Bit #24 is “1” in the Register Definitions for both 2.5v and 3.3v versions of this device.
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