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參數(shù)資料
| 型號(hào)： | CY62168DV3_06 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 16-Mbit (2M x 8) MoBL㈢ Static RAM |
| 中文描述： | 16兆位（2米× 8）的MoBL㈢靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 3/9頁(yè) |
| 文件大?。?/td> | 305K |
| 代理商： | CY62168DV3_06 |
CY62168DV30 MoBL
Document #: 38-05329 Rev. *F
Page 3 of 9
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ..................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground
Potential........................................ –0.3V to V
CC(max)
+ 0.3V
DC Voltage Applied to Outputs
in High-Z State
[4, 5]
......................... –0.3V to V
CC(max)
+ 0.3V
DC Input Voltage
[4, 5]
......................–0.3V to V
CC(max)
+ 0.3V
Output Current into Outputs (LOW).............................20 mA
Static Discharge Voltage...........................................> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.....................................................> 200 mA
Operating Range
Range
Industrial
Ambient
Temperature (T
A
)
[6]
–40°C to +85°C
V
CC
[7]
2.2V – 3.6V
DC Electrical Characteristics
(Over the Operating Range)
Parameter
Description
Test Conditions
CY62168DV30-55
Unit
Min.
Typ.
[3]
Max.
V
OH
Output HIGH Voltage
2.2V < V
CC
< 2.7V
I
OH
=
0.1 mA
2.0
V
2.7V < V
CC
< 3.6V
I
OH
=
1.0 mA
2.4
V
OL
Output LOW Voltage
2.2V < V
CC
< 2.7V
I
OL
= 0.1 mA
0.4
V
2.7V < V
CC
< 3.6V
I
OL
= 2.1 mA
0.4
V
IH
Input HIGH Voltage
2.2V < V
CC
< 2.7V
1.8
V
CC
+ 0.3
V
2.7V < V
CC
< 3.6V
2.2
V
CC
+ 0.3
V
IL
Input LOW Voltage
2.2V < V
CC
< 2.7V
–0.3
0.6
V
2.7V < V
CC
< 3.6V
–0.3
0.8
I
IX
Input Leakage Current
GND < V
I
< V
CC
–1
+1
μ
A
I
OZ
Output Leakage Current
GND < V
O
< V
CC
, Output disabled
–1
+1
μ
A
I
CC
V
CC
Operating Supply Current f = f
Max
= 1/t
RC
V
CC
= 3.6V,
I
OUT
= 0 mA,
CMOS level
15
30
mA
f = 1 MHz
2
4
I
SB1
Automatic CE Power-down
Current — CMOS Inputs
CE
1
> V
CC
0.2V, CE
2
< 0.2V,
V
IN
> V
CC
0.2V, V
IN
< 0.2V,
f = f
Max
(Address and Data Only),
f = 0 (OE, WE)
2.5
22
μ
A
I
SB2
Automatic CE Power-down
Current— CMOS Inputs
CE
1
> V
CC
0.2V, CE
2
< 0.2V,
V
IN
> V
CC
0.2V or V
IN
< 0.2V,
f = 0, V
CC
= 3.6V
2.5
22
μ
A
Capacitance
[8]
Parameter
Description
Test Conditions
Max.
Unit
C
IN
Input Capacitance
T
A
= 25°C, f = 1 MHz, V
CC
= V
CC(typ.)
8
pF
C
OUT
Output Capacitance
10
pF
Notes:
4. V
IL(min)
= –2.0V for pulse durations less than 20 ns.
5. V
IH(max)
= V
CC
+ 0.75V for pulse durations less than 20 ns.
6. T
7. Full device AC operation assumes a 100
μ
s ramp time from 0 to V
(min) and 100
μ
s wait time after V
CC
stabilization.
8. Tested initially and after any design or process changes that may affect these parameters.
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