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參數(shù)資料
| 型號： | CY62157CV30LL-70BAE |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 512K x 16 Static RAM |
| 中文描述： | 512K X 16 STANDARD SRAM, 70 ns, PBGA48 |
| 封裝： | 6 X 10 MM, 1.20 MM HEIGHT, FBGA-48 |
| 文件頁數(shù)： | 10/13頁 |
| 文件大小： | 328K |
| 代理商： | CY62157CV30LL-70BAE |
CY62157CV30/33
Document #: 38-05014 Rev. *F
Page 10 of 13
Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)
[19]
Truth Table
CE
1
H
X
X
L
L
CE
2
X
L
X
H
H
WE
X
X
X
H
H
OE
X
X
X
L
L
BHE
X
X
H
L
H
BLE
X
X
H
L
L
Inputs/Outputs
High Z
High Z
High Z
Data Out (I/O
O
–I/O
15
)
Data Out (I/O
O
–I/O
7
);
I/O
8
–I/O
15
in High Z
Data Out (I/O
8
–I/O
15
);
I/O
0
–I/O
7
in High Z
High Z
High Z
High Z
Data In (I/O
O
–I/O
15
)
Data In (I/O
O
–I/O
7
);
I/O
8
–I/O
15
in High Z
Data In (I/O
8
–I/O
15
);
I/O
0
–I/O
7
in High Z
Mode
Power
Deselect/Power-Down
Deselect/Power-Down
Deselect/Power-Down
Read
Read
Standby (I
SB
)
Standby (I
SB
)
Standby (I
SB
)
Active (I
CC
)
Active (I
CC
)
L
H
H
L
L
H
Read
Active (I
CC
)
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
H
H
H
X
X
L
H
L
L
H
L
L
H
L
L
Output Disabled
Output Disabled
Output Disabled
Write
Write
Active (I
CC
)
Active (I
CC
)
Active (I
CC
)
Active (I
CC
)
Active (I
CC
)
L
H
L
X
L
H
Write
Active (I
CC
)
Switching Waveforms
(continued)
DATA I/O
ADDRESS
t
HD
t
SD
t
SA
t
HA
t
AW
t
WC
CE
1
WE
DATA
IN
VALID
NOTE 20
t
BW
BHE/BLE
t
SCE
CE
2
t
PWE
[+] Feedback
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62157CV30LL-70BAI | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3V 8M-Bit 512K x 16 70ns 48-Pin FBGA 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY62157CV30LL-70BAIT | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3V 8M-Bit 512K x 16 70ns 48-Pin FBGA T/R 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| CY62157CV33LL-55BAI | 制造商:Cypress Semiconductor 功能描述: |
| CY62157CV33LL-55BAIT | 制造商:Cypress Semiconductor 功能描述: |
| CY62157CV33LL-70BAI | 制造商:Cypress Semiconductor 功能描述: 制造商:Rochester Electronics LLC 功能描述:8MB (512KX16) SRAM SLOW 3.3V SUPER LOW POWER - Bulk |
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