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參數資料
| 型號： | CY2833 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Intel CK408 Mobile Clock Synthesizer |
| 中文描述： | 英特爾CK408移動時鐘合成器 |
| 文件頁數： | 13/18頁 |
| 文件大?。?/td> | 224K |
| 代理商： | CY2833 |
CY28339
Document #: 38-07507 Rev. *A
Page 13 of 18
Absolute Maximum Conditions
Parameter
V
DD
V
DD_A
V
IN
T
S
T
A
T
J
ESD
HBM
JC
JA
UL-94
MSL
Description
Condition
Min.
–0.5
–0.5
–0.5
–65
0
–
2000
Max.
4.6
4.6
V
DD
+ 0.5
150
70
150
–
Unit
V
V
VDC
°C
°C
°C
Volts
°C/W
°C/W
Core Supply Voltage
Analog Supply Voltage
Input Voltage
Temperature, Storage
Temperature, Operating Ambient
Temperature, Junction
ESD Protection (Human Body Model)
Dissipation, Junction to Case
Dissipation, Junction to Ambient
Flammability Rating
Moisture Sensitivity Level
Relative to V
SS
Non Functional
Functional
Functional
MIL-STD-883, Method 3015
Mil-Spec 883E Method 1012.1
JEDEC (JESD 51)
At 1/8 in.
45
15
V–0
1
DC Electrical Specifications
Parameter
VDD_A
,
VDD_REF,
VDD_PCI,
VDD_3V66
,
VDD_48,
VDD_CPU
I
DD3.3V
Description
Condition
Min.
3.135
Max.
3.465
Unit
V
3.3 Operating Voltage
3.3 ± 5%
Dynamic Supply Current
All frequencies at maximum
values
PD# Asserted
–
280
mA
I
PD3.3V
C
IN
C
OUT
L
IN
C
XTAL
Power Down Supply Current
Input Pin Capacitance
Output Pin Capacitance
Pin Inductance
Crystal Pin Capacitance
–
–
–
–
mA
pF
pF
nH
pF
5
6
7
Measured from the XIN
30
42
AC Electrical Specifications
Parameter
Description
Condition
Min.
Max.
Unit
Crystal
T
DC
XIN Duty Cycle
The device will operate reliably with input duty
cycles up to 30/70 but the REF clock duty cycle
will not be within specification
When Xin is driven from an external clock source 69.841
Measured between 0.3V
DD
and 0.7V
DD
As an average over 1
μ
s duration
CPU at 0.7V
Measured at crossing point V
OX
Measured at crossing point V
OX
Measured at crossing point V
OX
Measured at crossing point V
OX
Measured at crossing point V
OX
47.5
52.5
%
T
PERIOD
T
R
/ T
F
T
CCJ
XIN period
XIN Rise and Fall Times
XIN Cycle to Cycle Jitter
71.0
10.0
500
ns
ns
ps
–
–
T
DC
T
PERIOD
T
PERIOD
T
PERIOD
T
PERIOD
T
SKEW
T
CCJ
CPUT and CPUC Duty Cycle
66MHz CPUT and CPUC Period
100MHz CPUT and CPUC Period
133MHz CPUT and CPUC Period
200MHz CPUT and CPUC Period
Any CPUT/C to CPUT/C Clock Skew Measured at crossing point V
OX
CPUT/C Cycle to Cycle Jitter
45
55
15.3
10.2
7.65
5.1
100
150
%
ns
ns
ns
ns
ps
ps
14.85
9.85
7.35
4.85
–
–
Measured at crossing point V
OX
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