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參數(shù)資料
| 型號： | CXD3009Q |
| 廠商： | Sony Corporation |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | CD Digital Signal Processor(CD數(shù)字信號處理器) |
| 中文描述： | CD數(shù)字信號處理器（光盤數(shù)字信號處理器） |
| 文件頁數(shù)： | 59/64頁 |
| 文件大?。?/td> | 477K |
| 代理商： | CXD3009Q |
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Digital Bass Boost Frequency Response [Hz]
[
Graph 5-2.
LRCK Synchronization
Synchronization is performed at the first falling edge of the LRCK input during reset.
After that, synchronization is lost when the LRCK input frequency changes and resynchronization must be
performed.
The LRCK input frequency changes when the master clock of the LSI is switched and the playback speed
changes such as the following cases.
When the XTSL pin switches between high and low
When the DSPB command of $9X setting changes
When the MCSL command of $9X setting changes
LRCK switching may also be performed if there are other ICs between the CD-DSP block and the DAC
block. Resynchronization must be performed in this case as well.
For resynchronization, set the LRWO command of $AX to 1, wait for one LRCK cycle or more, and then set
LRWO to 0.
When setting LRWO, set OPSL2 to 1. (See the $AX commands.)
SYCOF
When LRCK, PCMD and BCK are connected directly with LRCKI, PCMDI and BCKI, respectively, playback
can be performed easily in CAV-W mode by setting SYCOF of address 9 to 1.
Normally, the memory proof, etc., is used for playback in CAV-W mode.
In CAV-W mode, the LRCK output conforms not to the crystal but to the VCO. Therefore, synchronization is
frequently lost.
Setting SYCOF of address 9 to 1 ignores that the LRCKI input synchronization is lost, facilitating playback.
However, the playback is not perfect because pre-value hold or data skip occurs due to the wow flutter in the
LRCKI input.
Set SYCOF to 0 except when connecting LRCK, PCMD and BCK directly with LRCKI, PCMDI and BCKI,
respectively, and performing playback in CAV-W mode.
Set SYCOF to 0 in advance when LRCK resynchronization is applied with LRWO=1.
Digital Bass Boost
Bass boost without external parts is possible using the built-in digital filter. The boost strength has two levels:
Mid. and Max. BSBST and BBSL of address A are used for the setting.
See Graph 5-2 for the digital bass boost frequency response.
相關(guān)PDF資料 |
PDF描述 |
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| CXD3011R-1 | Hook-Up Wire; Conductor Size AWG:26; No. Strands x Strand Size:7 x 34; Jacket Color:White/Yellow; Cable/Wire MIL SPEC:MIL-W-16878/1 Type B; Conductor Material:Copper; Jacket Material:Polyvinylchloride (PVC) RoHS Compliant: Yes |
| CXD3017Q | CD Digital Signal Processor with Built-in Digital Servo and DAC(CD數(shù)字信號處理器（內(nèi)置數(shù)字伺服系統(tǒng)和 D/A轉(zhuǎn)換器）) |
| CXD3027R | CD Digital Signal Processor with Built-in Digital Servo +Shock-Proof Memory Controller + Digital High & Bass Boost(CD數(shù)字信號處理器(內(nèi)置數(shù)字伺服系統(tǒng)、防震存儲器控制器、數(shù)字式高&低音提升電路）) |
| cxd3027 | CD Audio Digital Signal-Processing LSI Device with On-Chip Digital Servo System Allows Listening without Sound Skipping |
| CXD3027R-1 | CD Audio Digital Signal-Processing LSI Device with On-Chip Digital Servo System Allows Listening without Sound Skipping |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD3011R-1 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD3017Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD3018Q/R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CD Digital Signal Processor with Built-in DigitalServo and DAC |
| CXD3021 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD3021R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
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