- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378985 > CXD3009Q (Sony Corporation) CD Digital Signal Processor(CD數(shù)字信號(hào)處理器) PDF資料下載
參數(shù)資料
| 型號(hào)： | CXD3009Q |
| 廠商： | Sony Corporation |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | CD Digital Signal Processor(CD數(shù)字信號(hào)處理器) |
| 中文描述： | CD數(shù)字信號(hào)處理器（光盤數(shù)字信號(hào)處理器） |
| 文件頁數(shù)： | 26/64頁 |
| 文件大?。?/td> | 477K |
| 代理商： | CXD3009Q |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
–
26
–
CXD3009Q
Peak meter
SQSO
XLAT
SQCK
(Peak meter)
L0
L1
L2
L3
L4
L5
L6
L7
R0
R1
R2
R3
R4
R5
R6
R7
Setting the SOCT command of $8X to 0 and the SL1 and SL0 commands of $BX to 0 and 1, respectively,
results in peak detection mode. The SQSO output is connected to the peak register. The maximum PCM data
values (absolute value, upper 8bits) for the left and right channels can be read from SQSO by inputting 16
clocks to SQCK. Peak detection is not performed during SQCK input, and the peak register does not change
during readout. This SQCK input judgment uses a retriggerable monostable multivibrator with a time constant
of 270μs to 400μs. The time during which SQCK input is high should be 270μs or less. Also, peak detection is
restarted 270μs to 400μs after SQCK input.
The peak register is reset with each readout (16 clocks input to SQCK).
The maximum value in peak detection mode is detected and held in this status until the next readout. When
switching to peak detection mode, readout should be performed one time initially to reset the peak detection
register.
Peak detection can also be performed for previous value hold and average value interpolation data.
Traverse monitor count value setting
These bits are set when monitoring the traverse condition of the SENS output according to the CNIN frequency
division.
Command bit
0
0
1
1
0
1
0
1
1/64 frequency division
1/128 frequency division
1/256 frequency division
1/512 frequency division
TRM1
XUGF
MNT1
RFCK
47
XPCK
MNT0
XPCK
48
GFS
MNT3
XROF
49
C2PO
C2PO
GTOP
50
MTSL1
0
0
1
Command bit
MTSL0
0
1
0
Pin No.
TRM0
Processing
Mode description
Monitor output switching
The monitor output can be switched to the various signals by setting the MTSL1 and MTSL0 commands of $B.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD3011R-1 | Hook-Up Wire; Conductor Size AWG:26; No. Strands x Strand Size:7 x 34; Jacket Color:White/Yellow; Cable/Wire MIL SPEC:MIL-W-16878/1 Type B; Conductor Material:Copper; Jacket Material:Polyvinylchloride (PVC) RoHS Compliant: Yes |
| CXD3017Q | CD Digital Signal Processor with Built-in Digital Servo and DAC(CD數(shù)字信號(hào)處理器（內(nèi)置數(shù)字伺服系統(tǒng)和 D/A轉(zhuǎn)換器）) |
| CXD3027R | CD Digital Signal Processor with Built-in Digital Servo +Shock-Proof Memory Controller + Digital High & Bass Boost(CD數(shù)字信號(hào)處理器(內(nèi)置數(shù)字伺服系統(tǒng)、防震存儲(chǔ)器控制器、數(shù)字式高&低音提升電路）) |
| cxd3027 | CD Audio Digital Signal-Processing LSI Device with On-Chip Digital Servo System Allows Listening without Sound Skipping |
| CXD3027R-1 | CD Audio Digital Signal-Processing LSI Device with On-Chip Digital Servo System Allows Listening without Sound Skipping |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD3011R-1 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD3017Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD3018Q/R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CD Digital Signal Processor with Built-in DigitalServo and DAC |
| CXD3021 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD3021R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。