- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378985 > CXD3009Q (Sony Corporation) CD Digital Signal Processor(CD數(shù)字信號處理器) PDF資料下載
參數(shù)資料
| 型號： | CXD3009Q |
| 廠商： | Sony Corporation |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | CD Digital Signal Processor(CD數(shù)字信號處理器) |
| 中文描述： | CD數(shù)字信號處理器（光盤數(shù)字信號處理器） |
| 文件頁數(shù)： | 41/64頁 |
| 文件大?。?/td> | 477K |
| 代理商： | CXD3009Q |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當(dāng)前第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
–
41
–
CXD3009Q
4. Description of Other Functions
4-1. Channel Clock Regeneration by the Digital PLL Circuit
The channel clock is necessary for demodulating the EFM signal regenerated by the optical system.
Assuming T as the channel clock cycle, the EFM signal is modulated in an integer multiple of T from 3T to
11T. In order to read the information in the EFM signal, this integer value must be read correctly. As a
result, T, that is the channel clock, is necessary.
In an actual player, a PLL is necessary to regenerate the channel clock because the fluctuation in the
spindle rotation alters the width of the EFM signal pulses.
The block diagram of this PLL is shown in Fig. 4-1.
The CXD3009Q has a built-in three-stage PLL.
The first-stage PLL is a wide-band PLL. When using the internal VCO2, an external LPF is necessary;
when not using the internal VCO2, external LPF and VCO are necessary.
The output of this first-stage PLL is used as a reference for all clocks within the LSI.
The second-stage PLL generates the high-frequency clock needed by the third-stage digital PLL.
The third-stage PLL is a digital PLL that regenerates the actual channel clock.
A new digital PLL has been provided for CLV-W mode to follow the rotational velocity of the disc in addition
to the conventional secondary loop.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD3011R-1 | Hook-Up Wire; Conductor Size AWG:26; No. Strands x Strand Size:7 x 34; Jacket Color:White/Yellow; Cable/Wire MIL SPEC:MIL-W-16878/1 Type B; Conductor Material:Copper; Jacket Material:Polyvinylchloride (PVC) RoHS Compliant: Yes |
| CXD3017Q | CD Digital Signal Processor with Built-in Digital Servo and DAC(CD數(shù)字信號處理器（內(nèi)置數(shù)字伺服系統(tǒng)和 D/A轉(zhuǎn)換器）) |
| CXD3027R | CD Digital Signal Processor with Built-in Digital Servo +Shock-Proof Memory Controller + Digital High & Bass Boost(CD數(shù)字信號處理器(內(nèi)置數(shù)字伺服系統(tǒng)、防震存儲器控制器、數(shù)字式高&低音提升電路）) |
| cxd3027 | CD Audio Digital Signal-Processing LSI Device with On-Chip Digital Servo System Allows Listening without Sound Skipping |
| CXD3027R-1 | CD Audio Digital Signal-Processing LSI Device with On-Chip Digital Servo System Allows Listening without Sound Skipping |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD3011R-1 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD3017Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD3018Q/R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CD Digital Signal Processor with Built-in DigitalServo and DAC |
| CXD3021 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD3021R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。