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參數(shù)資料
| 型號： | CS5460A-BS |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | ADC |
| 英文描述： | Single Phase Bi-Directional Power/Energy IC |
| 中文描述： | 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | MO-150, SSOP-24 |
| 文件頁數(shù)： | 50/54頁 |
| 文件大?。?/td> | 876K |
| 代理商： | CS5460A-BS |
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CS5460A
50
CRDY
Conversion Ready. Indicates a new conversion is ready. This will occur at the output word rate,
which is usually 4 kHz.
EDIR
Set whenever the EOUT bit asserted (see below) ifthe accumulated energy is negative.
EOUT
Indicates that enough positive/negative energy has been reached within the internal EOUT En-
ergy Accumulation Register (not accessible to user) to mandate the generation of one or more
pulses on the EOUT pin (if enabled, see Configuration Register). The energy flow may indicate
negative energy or positive energy. (The sign is determined by the EDIR bit, described above).
This EOUT bit is cleared automatically when the energy rate drops below the level that produc-
es a 4 kHz EOUT pin rate. The bit can also be cleared by writing to the Status Register. This
status bit is set with a maximum frequency of 4 kHz (when MCLK/K is 4.096 MHz). When
MCLK/K is not equal to 4.096 MHz, the user should scale the pulse-rate by a factor of
4.096 MHz / (MCLK/K) to get the actual pulse-rate.
DRDY
Data Ready. When running in ’single computation cycle’ or ’continuous computation cycles’
data acquisition modes, this bit will indicate the end of computation cycles. When running cali-
brations, this bit indicates that the calibration sequence has completed, and the results have
been stored in the offset or gain registers.
5.12 Control Register
Address: 28
Default** = 0x000000
STOP
1 = used to terminate the new EEBOOT sequence.
Res
Reserved. These bits must be set to zero.
MECH
1 = widens EOUT and EDIR pulses for mechanical counters.
INTL
1 = converts the INT output to open drain configuration.
SYNC
1 = forces internal A/D converter clock to synchronize to the initiation of a conversion command.
NOCPU
1 = converts the CPUCLK output to a one-bit output port. Reduces power consumption.
NOOSC
1 = saves power by disabling the crystal oscillator for external drive.
STEP
1 = enables stepper-motor signals on the EOUT/EDIR pins.
23
Res
22
Res
21
Res
20
Res
19
Res
18
Res
17
Res
16
Res
15
Res
14
Res
13
Res
12
Res
11
Res
10
Res
9
8
Res
STOP
7
6
5
4
3
2
1
0
Res
MECH
Res
INTL
SYNC
NOCPU
NOOSC
STEP
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CS5460A | Single Phase Bi-Directional Power/Energy IC |
| CS5460 | Single Phase Bi-Directional Power/Energy IC(單相雙向功率/能量IC) |
| CS5461A-IS | Single Phase, Bi-directional Power/Energy IC |
| CS5461A-ISZ | Single Phase, Bi-directional Power/Energy IC |
| CS5461A | Single Phase, Bi-directional Power/Energy IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS5460A-BSZ | 功能描述:電流和電力監(jiān)控器、調(diào)節(jié)器 Single-Phase Bi-Dir Power/Energy IC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Current Regulators 電源電壓-最大:48 V 電源電壓-最小:5.5 V 工作溫度范圍:- 40 C to + 150 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HPSO-8 封裝:Reel |
| CS5460A-BSZ | 制造商:Cirrus Logic 功能描述:Driver IC 制造商:Cirrus Logic 功能描述:IC ENERGY METERING 1PHASE 24SSOP 制造商:Cirrus Logic 功能描述:IC, ENERGY METERING, 1PHASE, 24SSOP |
| CS5460A-BSZR | 功能描述:電流和電力監(jiān)控器、調(diào)節(jié)器 IC Sngl-Phs BiDirect PWR/Energy RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Current Regulators 電源電壓-最大:48 V 電源電壓-最小:5.5 V 工作溫度范圍:- 40 C to + 150 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HPSO-8 封裝:Reel |
| CS5460-BS | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cirrus Logic 功能描述: |
| CS5460C-ISZ | 功能描述:電流和電力監(jiān)控器、調(diào)節(jié)器 Sngl-Phs Bi-Drctnl Power/Energy RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Current Regulators 電源電壓-最大:48 V 電源電壓-最小:5.5 V 工作溫度范圍:- 40 C to + 150 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HPSO-8 封裝:Reel |
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