參數(shù)資料
型號： CAP1014-1-EZK
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 模擬信號調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, QCC32
封裝： 5 X 5 MM, 0.50 MM PITCH, ROHS COMPLIANT, QFN-32
文件頁數(shù)： 32/73頁
文件大?。?/td> 945K
代理商： CAP1014-1-EZK
Multiple Channel Capacitive Touch Sensor and LED Driver
Datasheet
Revision 1.64 (01-15-09)
38
SMSC CAP1014
DATASHEET
5.7
Noise Flag Status Registers
The Noise Flag Status registers store status bits that are generated from the analog block if the
detected noise is above the operating region of the analog detector. These bits indicate that the most
recently received data from the sensor is invalid and should not be used for touch detection.
Furthermore, so long as the bit is set for a particular channel, no decisions are made with the data.
The queues are not updated, a touch is not detected, and a release is not detected.
These bits are not sticky and will be cleared automatically if the analog block does not report a noise
error.
5.8
GPIO Status Register
The GPIO Status register bits are set whenever one of the GPIO inputs changes states. If the LEDx /
GPIOx pin is not configured as a GPIO or as an input, then the respective bit will be set to a logic ‘0’.
The bits are cleared when the register is read.
5.9
Group Status Register
The Group Status register indicates that one or more actions was detected on the Grouped sensors.
The detectable actions are described in Section 4.5.
Bit 6 - MULT - This bit is asserted if one or more touches are being blocked because greater than N
buttons are simultaneously pressed.
Bit 3 - UP - Indicates that a slide was detected on increasing sensors (i.e. Sensor 1 -> Sensor 2 ->
Sensor 3). This bit is also set if a touch (tap or press and hold event) is detected on the “Up” portion
of the slider. If the Group auto-repeat is enabled, then the ALERT# pin will be periodically asserted
while a slide or press and hold event is detected. This bit will be cleared when read and re-set when
another interrupt is generated. This bit is cleared automatically if the DOWN bit is set.
Table 5.9 Noise Flag Status Registers
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
0Ah
R
Noise Flag
Status 1
-
S7_NO
ISE
S6_N
OISE
S5_NO
ISE
S4_N
OISE
S3_N
OISE
S2_NO
ISE
S1_N
OISE
00h
0Bh
R
Noise Flag
Status 2
-
S14_N
OISE
S13_N
OISE
S12_N
OISE
S11_N
OISE
S10_N
OISE
S9_NO
ISE
S8_N
OISE
00h
Table 5.10 GPIO Status Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
0Eh
R-C
GPIO Status
GPIO8
_STS
GPIO7
_STS
GPIO6
_STS
GPIO5
_STS
GPIO4
_STS
GPIO3
_STS
GPIO2
_STS
GPIO1
_STS
00h
Table 5.11 GPIO Status Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
0Fh
R-C
Group Status
-
MULT
-
UP
DOWN
TAP
PH
00h
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