參數(shù)資料
型號(hào): CAP1014-1-EZK
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, QCC32
封裝: 5 X 5 MM, 0.50 MM PITCH, ROHS COMPLIANT, QFN-32
文件頁數(shù): 28/73頁
文件大?。?/td> 945K
代理商: CAP1014-1-EZK
Multiple Channel Capacitive Touch Sensor and LED Driver
Datasheet
Revision 1.64 (01-15-09)
34
SMSC CAP1014
DATASHEET
Bit 6 - DEACT - Deactivates all sensor scanning and LED activity.
‘0’ - (default) - Sensor scanning is active and LEDs are functional.
‘1’ - All sensor scanning is disabled and all linked LED’s are disabled (see Section 5.33). The only
way to restart scanning is to clear this bit. The status registers are automatically cleared and the
INT bit is cleared.
Bit 5 - SLEEP - Enables Sleep mode by deactivating the LED activity.
‘0’ (default) - Sensor scanning is active and LEDs are functional.
‘1’ - All LED’s are disabled (except LED11) and the Capacitive Touch Sensor scanning is limited to
the sensors set in the Sleep Channel Control register (see Section 5.21). The status registers will
not be cleared.
Bit 4 - DSLEEP - Enables the Deep Sleep mode by deactivating all functions.
‘0’ (default) - Sensor scanning is active and LEDs are functional.
‘1’ - All sensor scanning is disabled and all LEDs are disabled (except LED11). The device will
return to its previous power state when the ALERT pin is driven to its active level (see Section 4.1).
The status registers are automatically cleared and the INT bit is cleared.
Bit 1 - PWR_LED - Controls the output of LED11 based on the state of bits 5 and 4.
‘0’ (default) - The LED11 output is in the “inactive” or off state.
‘1’ - The LED11 output is active in one of the following conditions:
a.Both bits 4 and 5 are set to a logic ‘0’ (normal mode). The LED will behave as defined the
the LED11_CTL bits (see Section 5.34).
b.Either bit 4 or bit 5 are set to a logic ‘1’ (sleep mode). The LED will behave as defined by the
LED11_ALT bits (see Section 5.34).
Bit 0 - INT - Indicates that there is an interrupt. This bit is only set if the ALERT pin has been asserted.
If a channel detects a press and its associated interrupt enable bit is not set to a logic ‘1’ then no
action is taken.
This bit is cleared by writing a logic ‘0’ to it. When this bit is cleared, the ALERT pin will be deasserted
and all status registers will be cleared if the condition has been removed.
‘0’ - No interrupt pending.
‘1’ - A button press has been detected on one or more channels and the interrupt has been
asserted.
5.2
Button Status Registers
The Button Status Registers store status bits that indicate a button press has been detected. A value
of ‘0’ in any bit indicates that no button press has been detected. A value of ‘1’ in any bit indicates
that a button press has been detected.
All status bits are cleared when the device enters the Deep Sleep or Inactive states (DSLEEP = ‘1’ or
DEACT = ‘1’ - see Section 5.1). All status bits are cleared when the INT bit is cleared and if a touch
on the respective Capacitive Touch Sensor is no longer present. If a touch is still detected, then the
bits will not be cleared (but this will not cause the interrupt to be asserted - see Section 5.13)
Table 5.3 Button Status Registers
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
03h
R
Button Status 1
UP
DOWN
CS6
CS5
CS4
CS3
CS2
CS1
00h
04h
R
Button Status 2
CS14
CS13
CS12
CS11
CS10
CS9
CS8
CS7
00h
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