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參數(shù)資料
| 型號： | BX805499040 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 1600 MHz, MICROPROCESSOR, CPGA611 |
| 封裝： | PGA-611 |
| 文件頁數(shù)： | 92/108頁 |
| 文件大小： | 2315K |
| 代理商： | BX805499040 |
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84
Dual-Core Intel Itanium Processor 9000 Series Datasheet
System Management Feature Specifications
3Ch
8
Reserved
Reserved for future use
00h
3Dh
8
Checksum
1 byte checksum
Add up by byte and
take 2’s complement
Part Numbers
3Eh
56
Processor Part Number
Seven 8-bit ASCII characters
80549KC
3Eh = “8”
3Fh = “0”
40h = “5”
41h = “4”
42h = “2”
43h = “K”
44h = “C”
45h
64
Processor Electronic
Signature
64-bit identification number
May have padded zeros
4Dh
168
Reserved
Reserved for future use
x0h
62h
8
Checksum
1 byte checksum
Add up by byte and
take 2’s complement
Thermal Reference
63h
8
Upper Temp Reference Byte
Hex value of thermal upper
temp limit
Default = 92 = 5Ch
64h
8
Thermal Calibration Offset
Byte Present
Number of degrees in error (±)
will be set per
part and expected to be
~ +12C
65h
8
Reserved
Reserved for future use
00h
66h
8
Checksum
1 byte checksum
Add up by byte and
take 2’s complement.
Features
67h
32
IA-32 Processor Core
Feature Flags
From 32 bit CPUID
4387FBFFh
6Bh
64
Reserved
Reserved (Processor core
feature flags implemented in the
Itanium processor family)
0000 0000 6380 811Bh
73h
32
Processor Feature Flags
All others are reserved:
[7] = Lockstep Enabled
[6] = Dual Core Enabled
[5] = Hyper-Threading Enabled
[4] = Upper temp reference byte
[3] = Thermal calibration offset
byte present
[2] = Scratch EERPOM present
[1] = Core VID Present
1 indicates EEPROM
data for specified field
is valid.
77h
4
Number of Devices in TAP
Chain
One 4-bit hex digit
2h for dual-core
processor
78h
4
Reserved
Reserved for future use
0h
79h
8
Checksum
1 byte checksum
Add up by byte and
take 2’s complement.
Other
7Ah
16
Reserved
Reserved for future use
0000h
Notes:
1. Refer to the Intel Itanium Architecture Software Developer’s Manual for details on CPUID registers.
2. The translation is using BCD.
Table 6-4.
Processor Information ROM Format (Sheet 3 of 3)
Offset/
Section
# of
Bits
Function
Notes
Examples
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