參數(shù)資料
型號(hào): BX80532PC2200D
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 2200 MHz, MICROPROCESSOR, XMA
封裝: BOXED PROCESSOR
文件頁(yè)數(shù): 26/88頁(yè)
文件大?。?/td> 1502K
代理商: BX80532PC2200D
32
Intel Pentium 4 Processor on 0.13 Micron Process Datasheet
Electrical Specifications
.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. VIL is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low value.
3. VIH is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high
value.
4. Refer to processor I/O Buffer Models for I/V characteristics.
5. The VCC referred to in these specifications is the instantaneous VCC.
6. Vol max of 0.450 V is guaranteed when driving into a test load of 50
as indicated in Figure 2-7.
7. Leakage to VSS with pin held at VCC.
8. Leakage to VCC with Pin held at 300 mV.
9. RON value is defined for a platform that is forward compatible with future processors.
10.GTLREF value is defined for a platform that is forward compatible with future processors.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. All outputs are open-drain.
3. The VCC referred to in these specifications refers to instantaneous VCC.
4. This specification applies to the asynchronous GTL+ signal group.
5. The maximum output current is based on maximum current handling capability of the buffer and is not
specified into the test load shown in Figure 2-7.
6. Refer to the processor I/O Buffer Models for I/V characteristics.
7. Vol max of 0.270 Volts is guaranteed when driving into a test load of 50
as indicated in Figure 2-7 for the
Asynchronous GTL+ signals.
8. Leakage to VSS with pin held at VCC.
9. Leakage to VCC with Pin held at 300 mV.
10.RON value is defined for a platform that is forward compatible with future processors.
Table 2-9. AGTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes1
GTLREF
Reference Voltage
2/3 VCC – 2%
2/3 VCC + 2%
V
GTLREF
Compatible
Reference Voltage
0.63 VCC – 2%
0.63 VCC +2%
V
10
VIH
Input High Voltage
1.10*GTLREF
VCC
V2,5
VIL
Input Low Voltage
0.0
0.9*GTLREF
V
3,5
VOH
Output High Voltage
N/A
VCC
V6
IOL
Output Low Current
N/A
50
mA
5
IHI
Pin Leakage High
N/A
100
A
7
ILO
Pin Leakage Low
N/A
500
A
8
RON
Buffer On Resistance
7
11
4
RON
Compatible
Buffer On Resistance
8.4
13.2
4, 9
Table 2-10. Asynchronous GTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes1
VIH
Input High Voltage Asynch GTL+
1.10*GTLREF
VCC
V3, 4
VIL
Input Low Voltage Asynch GTL+
0
0.9*GTLREF
V
4
VOH
Output High Voltage
VCC
V2, 3
IOL
Output Low Current
50
mA
5, 7
IHI
Pin Leakage High
N/A
100
A
8
ILO
Pin Leakage Low
N/A
500
A
9
Ron
Buffer On Resistance Asynch GTL+
7
11
4,6
RON
Compatible
Buffer On Resistance Asynch GTL+
8.4
13.2
4,6,10
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